diff mbox

[1/1] clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apll

Message ID 1385007454-5234-1-git-send-email-sachin.kamat@linaro.org (mailing list archive)
State New, archived
Headers show

Commit Message

Sachin Kamat Nov. 21, 2013, 4:17 a.m. UTC
Add CLK_SET_RATE_PARENT flag to be able to change the frequency
to desired value.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
---
 drivers/clk/samsung/clk-exynos5250.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Tomasz Figa Dec. 9, 2013, 1:31 p.m. UTC | #1
Hi Sachin,

On Thursday 21 of November 2013 09:47:34 Sachin Kamat wrote:
> Add CLK_SET_RATE_PARENT flag to be able to change the frequency
> to desired value.
> 
> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
> ---
>  drivers/clk/samsung/clk-exynos5250.c |    3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Your patch description is a bit off. It doesn't say frequency of what
clock will be able to be changed to "desired value" and what is the reason
for this change.

Best regards,
Tomasz
Sachin Kamat Dec. 9, 2013, 4:20 p.m. UTC | #2
Hi Tomasz,

On 9 December 2013 19:01, Tomasz Figa <t.figa@samsung.com> wrote:
> Hi Sachin,
>
> On Thursday 21 of November 2013 09:47:34 Sachin Kamat wrote:
>> Add CLK_SET_RATE_PARENT flag to be able to change the frequency
>> to desired value.
>>
>> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
>> ---
>>  drivers/clk/samsung/clk-exynos5250.c |    3 ++-
>>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> Your patch description is a bit off. It doesn't say frequency of what
> clock will be able to be changed to "desired value" and what is the reason
> for this change.

Yes, I realize that now. Will update and resend. Thanks for review.
diff mbox

Patch

diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
index 80f652053cb5..11178b1ad735 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -303,7 +303,8 @@  static struct samsung_mux_clock exynos5250_mux_clks[] __initdata = {
 	/*
 	 * CMU_CPU
 	 */
-	MUX_A(none, "mout_apll", mout_apll_p, SRC_CPU, 0, 1, "mout_apll"),
+	MUX_FA(none, "mout_apll", mout_apll_p, SRC_CPU, 0, 1,
+					CLK_SET_RATE_PARENT, 0, "mout_apll"),
 	MUX_A(none, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1, "mout_cpu"),
 
 	/*