From patchwork Thu Nov 21 06:11:36 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loc Ho X-Patchwork-Id: 3216911 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C1FFB9F26C for ; Thu, 21 Nov 2013 06:13:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EE39620752 for ; Thu, 21 Nov 2013 06:13:44 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 106032074B for ; Thu, 21 Nov 2013 06:13:44 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VjNVS-0004PA-Ml; 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Wed, 20 Nov 2013 22:12:04 -0800 (PST) X-Received: by 10.68.137.138 with SMTP id qi10mr4443755pbb.113.1385014324583; Wed, 20 Nov 2013 22:12:04 -0800 (PST) Received: from localhost ([198.137.200.11]) by mx.google.com with ESMTPSA id ja5sm42338306pbc.14.2013.11.20.22.12.03 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 20 Nov 2013 22:12:04 -0800 (PST) From: Loc Ho To: olof@lixom.net, tj@kernel.org, arnd@arndb.de Subject: [PATCH v4 2/4] Documentation:: Add documentation for APM X-Gene SoC SATA host controller DTS binding Date: Wed, 20 Nov 2013 23:11:36 -0700 Message-Id: <1385014298-15700-3-git-send-email-lho@apm.com> X-Mailer: git-send-email 1.5.5 In-Reply-To: <1385014298-15700-2-git-send-email-lho@apm.com> References: <1385014298-15700-1-git-send-email-lho@apm.com> <1385014298-15700-2-git-send-email-lho@apm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131121_011222_384155_4905F905 X-CRM114-Status: GOOD ( 11.08 ) X-Spam-Score: -4.2 (----) Cc: devicetree@vger.kernel.org, Suman Tripathi , linux-scsi@vger.kernel.org, jcm@redhat.com, linux-ide@vger.kernel.org, Loc Ho , Tuan Phan , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Documentation:: Add documentation for APM X-Gene SoC SATA host controller DTS binding Signed-off-by: Loc Ho Signed-off-by: Tuan Phan Signed-off-by: Suman Tripathi --- .../devicetree/bindings/ata/apm-xgene.txt | 56 ++++++++++++++++++++ 1 files changed, 56 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/ata/apm-xgene.txt diff --git a/Documentation/devicetree/bindings/ata/apm-xgene.txt b/Documentation/devicetree/bindings/ata/apm-xgene.txt new file mode 100644 index 0000000..ec470b8 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/apm-xgene.txt @@ -0,0 +1,56 @@ +* APM X-Gene 6.0 Gb/s SATA host controller nodes + +SATA host controller nodes are defined to describe on-chip Serial ATA +controllers. Each SATA controller (pair of ports) have its own node. + +Required properties: +- compatible : Shall be "apm,xgene-ahci" +- reg : First memory resource shall be the AHCI memory + resource. + Second memory resource shall be the host controller + memory resource. +- interrupt-parent : Interrupt controller +- interrupts : Interrupt mapping for SATA host controller IRQ +- clocks : Reference to the clock entry +- phys : PHY reference +- phy-names : Name of the PHY reference. The name should be + formed by "sataphy" plus lower case hex for the + lower 32-bit PHY CSR address (2nd memory resource) + +Optional properties: +- status : Shall be "ok" if enabled or "na" if disabled. + Default is "ok". + +Example: + sata0: sata@1a000000 { + compatible = "apm,xgene-ahci"; + reg = <0x0 0x1a000000 0x0 0x100000>, + <0x0 0x1f210000 0x0 0x10000>; + interrupt-parent = <&gic>; + interrupts = <0x0 0x86 0x4>; + status = "disabled"; + phys = <&sataphy0>; + phy-names = "sataphy1f210000"; + }; + + sata1: sata@1a400000 { + compatible = "apm,xgene-ahci"; + reg = <0x0 0x1a400000 0x0 0x100000>, + <0x0 0x1f220000 0x0 0x10000>; + interrupt-parent = <&gic>; + interrupts = <0x0 0x87 0x4>; + status = "ok"; + phys = <&sataphy1>; + phy-names = "sataphy1f220000"; + }; + + sata2: sata@1a800000 { + compatible = "apm,xgene-ahci"; + reg = <0x0 0x1a800000 0x0 0x100000>, + <0x0 0x1f230000 0x0 0x10000>; + interrupt-parent = <&gic>; + interrupts = <0x0 0x88 0x4>; + status = "ok"; + phys = <&sataphy2>; + phy-names = "sataphy1f230000"; + };