From patchwork Thu Nov 21 13:40:46 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hiroshi DOYU X-Patchwork-Id: 3218481 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1DEF3C045B for ; Thu, 21 Nov 2013 13:45:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 137D520579 for ; Thu, 21 Nov 2013 13:45:46 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4E8742051F for ; Thu, 21 Nov 2013 13:45:41 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VjUXp-0004D5-JO; Thu, 21 Nov 2013 13:43:46 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VjUXC-0003BG-Ev; Thu, 21 Nov 2013 13:43:06 +0000 Received: from hqemgate14.nvidia.com ([216.228.121.143]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VjUWB-00030B-PG for linux-arm-kernel@lists.infradead.org; Thu, 21 Nov 2013 13:42:11 +0000 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Thu, 21 Nov 2013 05:41:45 -0800 Received: from hqemhub03.nvidia.com ([172.20.12.94]) by hqnvupgp07.nvidia.com (PGP Universal service); Thu, 21 Nov 2013 05:39:41 -0800 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Thu, 21 Nov 2013 05:39:41 -0800 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQEMHUB03.nvidia.com (172.20.150.15) with Microsoft SMTP Server id 8.3.327.1; Thu, 21 Nov 2013 05:41:46 -0800 Received: from sc-daphne.nvidia.com (Not Verified[172.20.232.60]) by hqnvemgw02.nvidia.com with MailMarshal (v7,1,2,5326) id ; Thu, 21 Nov 2013 05:41:46 -0800 Received: from oreo.Nvidia.com (dhcp-10-21-26-134.nvidia.com [10.21.26.134]) by sc-daphne.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id rALDf0sB014302; Thu, 21 Nov 2013 05:41:42 -0800 (PST) From: Hiroshi Doyu To: , , , , , , Subject: [PATCHv6 10/13] iommu/tegra: smmu: allow duplicate ASID wirte Date: Thu, 21 Nov 2013 15:40:46 +0200 Message-ID: <1385041249-7705-11-git-send-email-hdoyu@nvidia.com> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1385041249-7705-1-git-send-email-hdoyu@nvidia.com> References: <1385041249-7705-1-git-send-email-hdoyu@nvidia.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131121_084203_966363_C3C49452 X-CRM114-Status: GOOD ( 12.07 ) X-Spam-Score: -2.4 (--) Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, galak@codeaurora.org, linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Hiroshi Doyu X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The device, which belongs to the same ASID, can try to enable the same ASID as the other swgroup devices. This should be allowed but just skip the actual register write. If the write value is different, it will return -EINVAL. Signed-off-by: Hiroshi Doyu --- v4: This was the part of v3, which isn't used any more. [PATCHv3 10/19] iommu/tegra: smmu: Get "nvidia,swgroups" from DT --- drivers/iommu/tegra-smmu.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index 1a1bcdf..76356db 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -418,9 +418,13 @@ static int __smmu_client_set_hwgrp(struct smmu_client *c, offs = HWGRP_ASID_REG(i); val = smmu_read(smmu, offs); if (on) { - if (WARN_ON(val & mask)) - goto err_hw_busy; - val |= mask; + if (val) { + if (WARN_ON(val != mask)) + return -EINVAL; + goto skip; + } + + val = mask; memcpy(c->hwgrp, map, sizeof(u64)); } else { WARN_ON((val & mask) == mask); @@ -430,16 +434,8 @@ static int __smmu_client_set_hwgrp(struct smmu_client *c, } FLUSH_SMMU_REGS(smmu); +skip: return 0; - -err_hw_busy: - for_each_set_bit(i, map, TEGRA_SWGROUP_MAX) { - offs = HWGRP_ASID_REG(i); - val = smmu_read(smmu, offs); - val &= ~mask; - smmu_write(smmu, val, offs); - } - return -EBUSY; } static int smmu_client_set_hwgrp(struct smmu_client *c,