From patchwork Fri Nov 22 23:57:17 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoffer Dall X-Patchwork-Id: 3224611 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EDC699F3AE for ; Sat, 23 Nov 2013 00:03:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0511420795 for ; Sat, 23 Nov 2013 00:03:08 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D16F620794 for ; Sat, 23 Nov 2013 00:03:06 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vk0gV-0003mt-Jl; Sat, 23 Nov 2013 00:02:51 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vk0gT-0007qg-5f; Sat, 23 Nov 2013 00:02:49 +0000 Received: from mail-pd0-f176.google.com ([209.85.192.176]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vk0gQ-0007qM-5x for linux-arm-kernel@lists.infradead.org; Sat, 23 Nov 2013 00:02:47 +0000 Received: by mail-pd0-f176.google.com with SMTP id w10so1914012pde.35 for ; Fri, 22 Nov 2013 16:02:24 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pFCbxes60+K8GliG9akgY0TUzLALNgdE9XipwLCJ8OQ=; b=SuYdqGB8ecXHR/dW5lkGEtRzWMle2Vdmh+Bdu/jnoPvx0jtUMM09o5eAuKM6AFXW2r wz9NRKE5Eo8Mbh1txrpYvIamHK/Jf2+/9FKImfLCToG07zsbtwGbQb50JL8eUi1QZfb1 u6ujoaudd3JCO78rwsfXQOQFpBRzd8cO+txo8XgRf3uYbOzplLOZL4NfzZRM2xeQkKlC FreH4GGkNGbjFfa455DmLX9rgyHPZmXcGzWEX1YGZzuyO59AKSC9kqLIxG4SGaESPuom Yl1JxB/nwhhq6GwX1WzdCMUUNADsLxZ3JCjVhysWkjhB//UPsYgqDjkuRAfSHCehfn7S otzQ== X-Gm-Message-State: ALoCoQl8K1TQLVbRpw4NrWp8yU+OHuVfmEwYrey29sg7p39go+9ZvSOPciFsWZOdVgDbMepYZb+x X-Received: by 10.69.1.105 with SMTP id bf9mr5260970pbd.53.1385164560442; Fri, 22 Nov 2013 15:56:00 -0800 (PST) Received: from localhost.localdomain (c-67-169-181-221.hsd1.ca.comcast.net. [67.169.181.221]) by mx.google.com with ESMTPSA id sd3sm55895043pbb.42.2013.11.22.15.55.58 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 22 Nov 2013 15:55:59 -0800 (PST) From: Christoffer Dall To: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/3] arm/arm64: KVM: vgic: Bugfix in handle_mmio_cfg_reg Date: Fri, 22 Nov 2013 15:57:17 -0800 Message-Id: <1385164639-18710-2-git-send-email-christoffer.dall@linaro.org> X-Mailer: git-send-email 1.8.4.3 In-Reply-To: <1385164639-18710-1-git-send-email-christoffer.dall@linaro.org> References: <1385164639-18710-1-git-send-email-christoffer.dall@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131122_190246_310811_7B888640 X-CRM114-Status: GOOD ( 10.71 ) X-Spam-Score: -1.9 (-) Cc: Haibin Wang , Christoffer Dall X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We shift the offset right by 1 bit because we pretend the register access is for a register packed with 1 bit per setting and not 2 bits like the hardware. However, after we expand the emulated register into the layout of the real hardware register, we need to use the hardware offset for accessing the register. Adjust the code accordingly. Cc: Haibin Wang Reported-by: Haibin Wang Signed-off-by: Christoffer Dall --- virt/kvm/arm/vgic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c index 685fc72..6699ed9 100644 --- a/virt/kvm/arm/vgic.c +++ b/virt/kvm/arm/vgic.c @@ -553,7 +553,7 @@ static bool handle_mmio_cfg_reg(struct kvm_vcpu *vcpu, val = *reg & 0xffff; val = vgic_cfg_expand(val); - vgic_reg_access(mmio, &val, offset, + vgic_reg_access(mmio, &val, offset << 1, ACCESS_READ_VALUE | ACCESS_WRITE_VALUE); if (mmio->is_write) { if (offset < 4) {