From patchwork Wed Nov 27 01:04:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Soren Brinkmann X-Patchwork-Id: 3243391 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8B89EC045B for ; Wed, 27 Nov 2013 01:08:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id ACD2D20520 for ; Wed, 27 Nov 2013 01:08:29 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CA9A020549 for ; Wed, 27 Nov 2013 01:08:28 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VlTah-0003kg-Qd; Wed, 27 Nov 2013 01:06:57 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VlTaK-00043p-HV; Wed, 27 Nov 2013 01:06:32 +0000 Received: from mail-pd0-x22b.google.com ([2607:f8b0:400e:c02::22b]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VlTZW-0003vK-G3 for linux-arm-kernel@lists.infradead.org; Wed, 27 Nov 2013 01:05:43 +0000 Received: by mail-pd0-f171.google.com with SMTP id z10so8823677pdj.16 for ; Tue, 26 Nov 2013 17:05:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=1EbaGZ3LZBGrcCT8PyeImGca8W24mqkzzq+rugaxLWg=; b=CCZPvnQN+cdLaCiTvXy8jfSNLwjPgWXBU1WbP/fREFhFqY9PcoVsTSJE0ERLSI8shC dzoL8K/NwIBU5Rz1y6eV7KXo4wm/BQHhbFRh81ynkciaP+/cDvuKbxBgLUrXT0jqX7Hj NgeATUFb5UVQVXhKvjPfqxCsLwAJrAu0yxoxgURTcQ7efNTADlhXSPx8kj9g+JtM5wWP V4Jtk5VMCVukvEegu/wjbwP2mKHIbva0lrVjj4NY0OaQau9OlSMou0am7VnH29YJrcdx owSBd0CrfjaBNE7Oai1ESIgVVo9KC0jFgG6XRL0ai7a/Asl0GGf788o6SR1MKeyXboNB w3Yw== X-Received: by 10.68.190.169 with SMTP id gr9mr2306247pbc.30.1385514320806; Tue, 26 Nov 2013 17:05:20 -0800 (PST) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPSA id ie6sm57345921pbc.6.2013.11.26.17.05.19 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 26 Nov 2013 17:05:19 -0800 (PST) From: Soren Brinkmann To: Rob Herring , Pawel Moll , Mark Rutland , Stephen Warren , Ian Campbell , Russell King , Michal Simek , Daniel Lezcano , Thomas Gleixner Subject: [PATCH v2 4/9] clocksource/cadence_ttc: Use enable/disable_irq Date: Tue, 26 Nov 2013 17:04:51 -0800 Message-Id: <1385514296-26702-5-git-send-email-soren.brinkmann@xilinx.com> X-Mailer: git-send-email 1.8.4.4 In-Reply-To: <1385514296-26702-1-git-send-email-soren.brinkmann@xilinx.com> References: <1385514296-26702-1-git-send-email-soren.brinkmann@xilinx.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131126_200542_653589_1FEF6636 X-CRM114-Status: GOOD ( 10.10 ) X-Spam-Score: -1.9 (-) Cc: Soren Brinkmann , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To ensure that the timer interrupt is properly enabled/disabled across the whole CPU cluster use enable/disable_irq() instead of local_irq_disable(). Signed-off-by: Soren Brinkmann --- drivers/clocksource/cadence_ttc_timer.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c index a92350b55d32..246d018d1e63 100644 --- a/drivers/clocksource/cadence_ttc_timer.c +++ b/drivers/clocksource/cadence_ttc_timer.c @@ -322,18 +322,16 @@ static int ttc_rate_change_clockevent_cb(struct notifier_block *nb, switch (event) { case POST_RATE_CHANGE: { - unsigned long flags; - /* * clockevents_update_freq should be called with IRQ disabled on * the CPU the timer provides events for. The timer we use is * common to both CPUs, not sure if we need to run on both * cores. */ - local_irq_save(flags); + disable_irq(ttcce->ce.irq); clockevents_update_freq(&ttcce->ce, ndata->new_rate / PRESCALE); - local_irq_restore(flags); + enable_irq(ttcce->ce.irq); /* update cached frequency */ ttc->freq = ndata->new_rate;