From patchwork Tue Dec 3 16:39:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanjun Guo X-Patchwork-Id: 3277891 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9281B9F373 for ; Tue, 3 Dec 2013 17:00:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 01156203F1 for ; Tue, 3 Dec 2013 17:00:43 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0FE5F203E3 for ; Tue, 3 Dec 2013 17:00:38 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vnt1r-0006JX-N7; Tue, 03 Dec 2013 16:40:56 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vnt17-00013Q-6l; Tue, 03 Dec 2013 16:40:09 +0000 Received: from mail-pd0-f171.google.com ([209.85.192.171]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vnt14-00011C-09 for linux-arm-kernel@lists.infradead.org; Tue, 03 Dec 2013 16:40:06 +0000 Received: by mail-pd0-f171.google.com with SMTP id z10so20348472pdj.2 for ; Tue, 03 Dec 2013 08:39:45 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=50LQu4Q05oxV+CQ5ThPF+Q6B01lhKqstdkHTatxK08g=; b=Oc6kCvPQLdUPWqgSOQ25CjM/PIGAiNGdz2VT0U0tZiZ6w3jfcvAeV5WkFC9jQABLgv +/wiRHdn99K5HpbOcjooJ67S+ynLGE/+qlcqu5Fn6ug7K/HzzfiVyXiM3NEfpx8nGyuk Msh+Iz5SZrvXVj2N9SZhDgt4fvfbvfY/S9aHlKW9nDLTCCKrhcj/Ia70WOCyDXnlTn7x 9hr2ncegwzrekqrPQmZrTXGi8AZmKh6goLqCRQsD7JPAI2Ae5okCchFkL/7SciLyL6x+ xwWLDAdev/5jvbCLo4/7g+SW+dmLJA2GXvxM7sKI6ZITxo5bSe9NnUFK/TDJvoLPzlCC ZdmA== X-Gm-Message-State: ALoCoQkJm+LE3EV+aSvwFi84GhbnKWXL6F43yvM2kdv0XkZuGe7VBPbY2GkRkhCpANBidF53yelL X-Received: by 10.68.131.202 with SMTP id oo10mr31599541pbb.35.1386088784327; Tue, 03 Dec 2013 08:39:44 -0800 (PST) Received: from localhost ([219.142.3.202]) by mx.google.com with ESMTPSA id sg1sm131172190pbb.16.2013.12.03.08.39.35 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 03 Dec 2013 08:39:43 -0800 (PST) From: Hanjun Guo To: "Rafael J. Wysocki" , Catalin Marinas , Will Deacon , Russell King - ARM Linux , Daniel Lezcano Subject: [RFC part2 PATCH 1/9] ARM64 / ACPI: Implement core functions for parsing MADT table Date: Wed, 4 Dec 2013 00:39:05 +0800 Message-Id: <1386088753-2850-2-git-send-email-hanjun.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1386088753-2850-1-git-send-email-hanjun.guo@linaro.org> References: <1386088753-2850-1-git-send-email-hanjun.guo@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131203_114006_247383_AB132872 X-CRM114-Status: GOOD ( 21.13 ) X-Spam-Score: -1.9 (-) Cc: Mark Rutland , Matthew Garrett , linaro-kernel@lists.linaro.org, patches@linaro.org, Linus Walleij , Olof Johansson , linux-kernel@vger.kernel.org, Rob Herring , linaro-acpi@lists.linaro.org, linux-acpi@vger.kernel.org, Jon Masters , Grant Likely , Bjorn Helgaas , linux-arm-kernel@lists.infradead.org, Hanjun Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Implement core functions for parsing MADT table to get the information about GIC cpu interface and GIC distributor. Signed-off-by: Hanjun Guo --- arch/arm64/include/asm/acpi.h | 3 + drivers/acpi/plat/arm-core.c | 139 ++++++++++++++++++++++++++++++++++++++++- drivers/acpi/tables.c | 21 +++++++ 3 files changed, 162 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index c830adc..be2951c 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -83,6 +83,9 @@ void arch_fix_phys_package_id(int num, u32 slot); extern int (*acpi_suspend_lowlevel)(void); #define acpi_wakeup_address (0) +#define MAX_GIC_CPU_INTERFACE 256 +#define MAX_GIC_DISTRIBUTOR 1 /* should be the same as MAX_GIC_NR */ + #else /* !CONFIG_ACPI */ #define acpi_disabled 1 /* ACPI sometimes enabled on ARM */ #define acpi_noirq 1 /* ACPI sometimes enabled on ARM */ diff --git a/drivers/acpi/plat/arm-core.c b/drivers/acpi/plat/arm-core.c index 2b6df56..45ff625 100644 --- a/drivers/acpi/plat/arm-core.c +++ b/drivers/acpi/plat/arm-core.c @@ -52,6 +52,16 @@ EXPORT_SYMBOL(acpi_disabled); int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ EXPORT_SYMBOL(acpi_pci_disabled); +/* + * Local interrupt controller address, + * GIC cpu interface base address on ARM/ARM64 + */ +static u64 acpi_lapic_addr __initdata; + +#define BAD_MADT_ENTRY(entry, end) ( \ + (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ + ((struct acpi_subtable_header *)entry)->length < sizeof(*entry)) + #define PREFIX "ACPI: " /* FIXME: this function should be moved to topology.c when it is ready */ @@ -102,6 +112,115 @@ void __init __acpi_unmap_table(char *map, unsigned long size) return; } +static int __init acpi_parse_madt(struct acpi_table_header *table) +{ + struct acpi_table_madt *madt = NULL; + + madt = (struct acpi_table_madt *)table; + if (!madt) { + pr_warn(PREFIX "Unable to map MADT\n"); + return -ENODEV; + } + + if (madt->address) { + acpi_lapic_addr = (u64) madt->address; + + pr_info(PREFIX "Local APIC address 0x%08x\n", madt->address); + } + + return 0; +} + +/* + * GIC structures on ARM are somthing like Local APIC structures on x86, + * which means GIC cpu interfaces for GICv2/v3. Every GIC structure in + * MADT table represents a cpu in the system. + * + * GIC distributor structures are somthing like IOAPIC on x86. GIC can + * be initialized with information in this structure. + * + * Please refer to chapter5.2.12.14/15 of ACPI 5.0 + */ + +static int __init +acpi_parse_gic(struct acpi_subtable_header *header, const unsigned long end) +{ + struct acpi_madt_generic_interrupt *processor = NULL; + + processor = (struct acpi_madt_generic_interrupt *)header; + + if (BAD_MADT_ENTRY(processor, end)) + return -EINVAL; + + acpi_table_print_madt_entry(header); + + return 0; +} + +static int __init +acpi_parse_gic_distributor(struct acpi_subtable_header *header, + const unsigned long end) +{ + struct acpi_madt_generic_distributor *distributor = NULL; + + distributor = (struct acpi_madt_generic_distributor *)header; + + if (BAD_MADT_ENTRY(distributor, end)) + return -EINVAL; + + acpi_table_print_madt_entry(header); + + return 0; +} + +/* + * Parse GIC cpu interface related entries in MADT + * returns 0 on success, < 0 on error + */ +static int __init acpi_parse_madt_gic_entries(void) +{ + int count; + + /* + * do a partial walk of MADT to determine how many CPUs + * we have including disabled CPUs + */ + count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT, + acpi_parse_gic, MAX_GIC_CPU_INTERFACE); + + if (!count) { + pr_err(PREFIX "No GIC entries present\n"); + return -ENODEV; + } else if (count < 0) { + pr_err(PREFIX "Error parsing GIC entry\n"); + return count; + } + + return 0; +} + +/* + * Parse GIC distributor related entries in MADT + * returns 0 on success, < 0 on error + */ +static int __init acpi_parse_madt_gic_distributor_entries(void) +{ + int count; + + count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR, + acpi_parse_gic_distributor, MAX_GIC_DISTRIBUTOR); + + if (!count) { + pr_err(PREFIX "No GIC distributor entries present\n"); + return -ENODEV; + } else if (count < 0) { + pr_err(PREFIX "Error parsing GIC distributor entry\n"); + return count; + } + + return 0; +} + int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) { *irq = gsi_to_irq(gsi); @@ -132,11 +251,29 @@ static int __init acpi_parse_fadt(struct acpi_table_header *table) static void __init early_acpi_process_madt(void) { - return; + acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt); } static void __init acpi_process_madt(void) { + int error; + + if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { + + /* + * Parse MADT GIC cpu interface entries + */ + error = acpi_parse_madt_gic_entries(); + if (!error) { + /* + * Parse MADT GIC distributor entries + */ + acpi_parse_madt_gic_distributor_entries(); + } + } + + pr_info("Using ACPI for processor (GIC) configuration information\n"); + return; } diff --git a/drivers/acpi/tables.c b/drivers/acpi/tables.c index d67a1fe..b3e4615 100644 --- a/drivers/acpi/tables.c +++ b/drivers/acpi/tables.c @@ -191,6 +191,27 @@ void acpi_table_print_madt_entry(struct acpi_subtable_header *header) } break; + case ACPI_MADT_TYPE_GENERIC_INTERRUPT: + { + struct acpi_madt_generic_interrupt *p = + (struct acpi_madt_generic_interrupt *)header; + printk(KERN_INFO PREFIX + "GIC (acpi_id[0x%04x] gic_id[0x%04x] %s)\n", + p->uid, p->gic_id, + (p->flags & ACPI_MADT_ENABLED) ? "enabled" : "disabled"); + } + break; + + case ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR: + { + struct acpi_madt_generic_distributor *p = + (struct acpi_madt_generic_distributor *)header; + printk(KERN_INFO PREFIX + "GIC Distributor (id[0x%04x] address[0x%08llx] gsi_base[%d])\n", + p->gic_id, p->base_address, p->global_irq_base); + } + break; + default: printk(KERN_WARNING PREFIX "Found unsupported MADT entry (type = 0x%x)\n",