From patchwork Tue Dec 3 16:41:29 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanjun Guo X-Patchwork-Id: 3277771 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E6251C0D4A for ; Tue, 3 Dec 2013 16:43:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C5AF120173 for ; Tue, 3 Dec 2013 16:43:37 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 820B32015E for ; Tue, 3 Dec 2013 16:43:36 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vnt3S-0007cl-R2; Tue, 03 Dec 2013 16:42:35 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vnt3A-0001Li-47; Tue, 03 Dec 2013 16:42:16 +0000 Received: from mail-pb0-f45.google.com ([209.85.160.45]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vnt37-0001IP-6Y for linux-arm-kernel@lists.infradead.org; Tue, 03 Dec 2013 16:42:14 +0000 Received: by mail-pb0-f45.google.com with SMTP id rp16so21323477pbb.4 for ; Tue, 03 Dec 2013 08:41:50 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=lvuvPoYnqKcaQL9Mv3P61N+m7Zyf/JigU8htz4yPujo=; b=kgo1FPYzQ+2+9wpC8qkLpSRC/FXSDrPJOMT9Sq7QKswEAZTuEoOidSbZDHXLkYy0V7 i7YKqprHWijLXQD6jGGbF4/wTfXuLSxG0usNiCVu8BCr1B65Y7I9eAtnxRO+260at+p6 P8wklzw8b9iD31cjnPPK5q5LqtwCVsO7rhSkey9KfqZfjqNmO40Wqq4Y/j3pVyvxYXiu 0WSsDwe+lxl9UgNf0vUExJdyVVLaj5B6fXpXIvCrPoSijDU7uA9Vo8ntVuDDd4JSFLgj LPSS9S6exmdyKNWfHBitO5A+gFO2N7uztU71xmRiuiU/Opx4qmk34HfcHm2BU5g3j9U0 NpGA== X-Gm-Message-State: ALoCoQlRLrY08BbnJR0iebr0pD5FzJRb81OlzatZwDAbq913pVDHztsIKf5fT6OrTdTuNbC6bWQ+ X-Received: by 10.66.118.71 with SMTP id kk7mr76477533pab.14.1386088910553; Tue, 03 Dec 2013 08:41:50 -0800 (PST) Received: from localhost ([61.148.199.138]) by mx.google.com with ESMTPSA id om6sm41401605pbc.43.2013.12.03.08.41.37 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 03 Dec 2013 08:41:49 -0800 (PST) From: Hanjun Guo To: "Rafael J. Wysocki" , Catalin Marinas , Will Deacon , Russell King - ARM Linux , Daniel Lezcano Subject: [RFC part3 PATCH 0/2] Using ACPI GTDT table to initialize arch timer Date: Wed, 4 Dec 2013 00:41:29 +0800 Message-Id: <1386088891-2917-1-git-send-email-hanjun.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131203_114213_364221_EC88F5F0 X-CRM114-Status: GOOD ( 15.04 ) X-Spam-Score: -2.6 (--) Cc: Mark Rutland , Matthew Garrett , linaro-kernel@lists.linaro.org, patches@linaro.org, Linus Walleij , Olof Johansson , linux-kernel@vger.kernel.org, Rob Herring , linaro-acpi@lists.linaro.org, linux-acpi@vger.kernel.org, Jon Masters , Grant Likely , Bjorn Helgaas , linux-arm-kernel@lists.infradead.org, Hanjun Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This is the last part of patch set for core of ARM64 ACPI, and is based on the patch set part2 "Using ACPI MADT table to initialise SMP and GIC". ACPI GTDT (Generic Timer Description Table) is used for ARM/ARM64 only, and contains the information for arch timer initialisation. This patch trys to convert the arch timer to ACPI using GTDT. After this patch set was posted, we already finished the SMP, GIC and arch timer initialisation, which all are essential for ARM64 core system running, then we will focus on converting the device drivers to ACPI. Here is the GTDT ASL code I used: --- platforms/foundation-v8.acpi/gtdt.asl | 35 ++++++++++++++++++++++----------- 1 file changed, 23 insertions(+), 12 deletions(-) Hanjun Guo (2): clocksource / arch_timer: Use ACPI GTDT table to initialize arch timer ARM64 / clocksource: Use arch_timer_acpi_init() arch/arm64/kernel/time.c | 4 ++ drivers/clocksource/arm_arch_timer.c | 129 ++++++++++++++++++++++++++++++---- include/clocksource/arm_arch_timer.h | 7 +- 3 files changed, 124 insertions(+), 16 deletions(-) diff --git a/platforms/foundation-v8.acpi/gtdt.asl b/platforms/foundation-v8.acpi/gtdt.asl index 18c821a..714d61c 100644 --- a/platforms/foundation-v8.acpi/gtdt.asl +++ b/platforms/foundation-v8.acpi/gtdt.asl @@ -1,5 +1,6 @@ /* * Copyright (c) 2013, Al Stone + * Hanjun Guo * * [GTDT] Generic Timer Description Table * Format: [ByteLength] FieldName : HexFieldValue @@ -21,22 +22,32 @@ [0004] Flags (decoded below) : 00000001 Memory Present : 1 -[0004] Secure PL1 Interrupt : 00000000 -[0004] SPL1 Flags (decoded below) : 00000000 - Trigger Mode : 0 +/* In Foundation model's dts file, the last cell of interrupts + * is 0xff01, it means its cpu mask is FF, and trigger type + * and flag is 1 = low-to-high edge triggered. + * + * so in ACPI the Trigger Mode is 1 - Edge triggered, and + * Polarity is 0 - Active high as ACPI spec describled. + * + * using direct mapping for hwirqs, it means that we using + * ID [16, 31] for PPI, not [0, 15] used in FDT. + */ +[0004] Secure PL1 Interrupt : 0000001d +[0004] SPL1 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Non-Secure PL1 Interrupt : 00000000 -[0004] NSPL1 Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Non-Secure PL1 Interrupt : 0000001e +[0004] NSPL1 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Virtual Timer Interrupt : 00000000 -[0004] VT Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Virtual Timer Interrupt : 0000001b +[0004] VT Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Non-Secure PL2 Interrupt : 00000000 -[0004] NSPL2 Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Non-Secure PL2 Interrupt : 0000001a +[0004] NSPL2 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0