From patchwork Fri Dec 6 15:56:26 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Sharma X-Patchwork-Id: 3298821 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 30470C0D4A for ; Fri, 6 Dec 2013 15:59:23 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EC3872052D for ; Fri, 6 Dec 2013 15:59:21 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 840C32052A for ; Fri, 6 Dec 2013 15:59:20 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VoxnP-0004yQ-Vy; Fri, 06 Dec 2013 15:58:28 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VoxnD-0001Rq-8X; Fri, 06 Dec 2013 15:58:15 +0000 Received: from mailout1.samsung.com ([203.254.224.24]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Voxmg-0001Mf-VO for linux-arm-kernel@lists.infradead.org; Fri, 06 Dec 2013 15:57:45 +0000 Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MXE00IHE6ZJ4FC0@mailout1.samsung.com> for linux-arm-kernel@lists.infradead.org; Sat, 07 Dec 2013 00:57:19 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.125]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id 21.71.16251.FD3F1A25; Sat, 07 Dec 2013 00:57:19 +0900 (KST) X-AuditID: cbfee691-b7fd26d000003f7b-fd-52a1f3dfa581 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id DF.85.15903.FD3F1A25; Sat, 07 Dec 2013 00:57:19 +0900 (KST) Received: from localhost.localdomain ([107.108.83.245]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MXE003WB6Z2JY10@mmp2.samsung.com>; Sat, 07 Dec 2013 00:57:19 +0900 (KST) From: Rahul Sharma To: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/7] pinctrl: exynos: add exynos5260 SoC specific data Date: Fri, 06 Dec 2013 21:26:26 +0530 Message-id: <1386345391-23482-3-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1386345391-23482-1-git-send-email-rahul.sharma@samsung.com> References: <1386345391-23482-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupnkeLIzCtJLcpLzFFi42JZI2JSq3v/88Igg9u31Sw+nrrNajH/yDlW i++7vrBb9C64ymax6fE1VosZ5/cxWTydcJHNYtFWoMTCF/EWUxYdZrXoWMZosWrXH0aLHS2r WRx4PXbOusvucefaHjaPzUvqPfq2rGL0+LxJLoA1issmJTUnsyy1SN8ugStj6pJdzAWHjCou 3A5sYJyp3cXIySEhYCKx7vl8FghbTOLCvfVsXYxcHEICSxklVr7pZYYpmnzqKitEYjqjxMJN s9ghnHYmiRuvfjGBVLEJ6ErMPviMsYuRg0NEIFNi45ZckBpmgb+MEhe27mIHqREWcJO4dnsC 2FQWAVWJe3Pngq3mFfCQ2NS2EqxXQkBBYs4kGxCTU8BTYtmDAJAKIaCKLQ/7wNZKCBxjl/i7 YiErxBgBiW+TD7FAtMpKbDoAdbOkxMEVN1gmMAovYGRYxSiaWpBcUJyUXmSqV5yYW1yal66X nJ+7iREYGaf/PZu4g/H+AetDjMlA4yYyS4km5wMjK68k3tDYzMjC1MTU2Mjc0ow0YSVx3vRH SUFCAumJJanZqakFqUXxRaU5qcWHGJk4OKUaGA2ddt4x/OEksHrGftHqZMZHYuw6p2bV3Nyx 9eyadS5lu45H8Tp83L6nTyWiq/7hZsXv2/osj77df6Fl2TppZ8OgTJMHTxZ/4+dYIyK2IevD 4/UpShzRLodfzG2czv/2ieuh3/LpJV732BKY5oqu26Dof//uM8aK9YsX31yiHH1y4Ztg/xmW 7j+VWIozEg21mIuKEwHm9pK5ogIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrDIsWRmVeSWpSXmKPExsVy+t9jQd37nxcGGTxbIWXx8dRtVov5R86x Wnzf9YXdonfBVTaLTY+vsVrMOL+PyeLphItsFou2AiUWvoi3mLLoMKtFxzJGi1W7/jBa7GhZ zeLA67Fz1l12jzvX9rB5bF5S79G3ZRWjx+dNcgGsUQ2MNhmpiSmpRQqpecn5KZl56bZK3sHx zvGmZgaGuoaWFuZKCnmJuam2Si4+AbpumTlAJyoplCXmlAKFAhKLi5X07TBNCA1x07WAaYzQ 9Q0JgusxMkADCWsYM6Yu2cVccMio4sLtwAbGmdpdjJwcEgImEpNPXWWFsMUkLtxbz9bFyMUh JDCdUWLhplnsEE47k8SNV7+YQKrYBHQlZh98xtjFyMEhIpApsXFLLkgNs8BfRokLW3exg9QI C7hJXLs9gRnEZhFQlbg3dy4LiM0r4CGxqW0lWK+EgILEnEk2ICangKfEsgcBIBVCQBVbHvax T2DkXcDIsIpRNLUguaA4KT3XSK84Mbe4NC9dLzk/dxMjOO6eSe9gXNVgcYhRgINRiYeXY9WC ICHWxLLiytxDjBIczEoivEfuLAwS4k1JrKxKLcqPLyrNSS0+xJgMdNNEZinR5HxgSsgriTc0 NjE3NTa1NLEwMbMkTVhJnPdgq3WgkEB6YklqdmpqQWoRzBYmDk6pBkan0Lyyax2Pk93en1Vu Pqpw8rWlZHWrpm+woULTgy36x1+7SS987f614PvCr5mhDF66EQsTebp8m5LmbN9vd8HX4niS ov1bjZV+HFkLdyjsvz+HdbLqiQd10wvzXeoy+wIbeE7b5+z5pi2p8Wp3xIblvsZTpXmZDV4p md3hsqhz0+FnLf5To8RSnJFoqMVcVJwIAF2LlcX/AgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131206_105743_281201_F94C3A6F X-CRM114-Status: GOOD ( 11.30 ) X-Spam-Score: -7.1 (-------) Cc: kgene.kim@samsung.com, mturquette@linaro.org, pankaj.dubey@samsung.com, joshi@samsung.com, tomasz.figa@gmail.com, thomas.ab@samsung.com, yg1004.jang@samsung.com, r.sh.open@gmail.com, arun.kk@samsung.com, Rahul Sharma X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Young-Gun Jang Add Samsung Exynos5260 SoC specific data to enable pinctrl support for all platforms based on EXYNOS5260. Signed-off-by: Pankaj Dubey Signed-off-by: Rahul Sharma Signed-off-by: Arun Kumar K --- .../bindings/pinctrl/samsung-pinctrl.txt | 1 + drivers/pinctrl/pinctrl-exynos.c | 82 ++++++++++++++++++++ drivers/pinctrl/pinctrl-samsung.c | 2 + drivers/pinctrl/pinctrl-samsung.h | 1 + 4 files changed, 86 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index 257677d..2b32783 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -16,6 +16,7 @@ Required Properties: - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller. - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller. - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller. + - "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller. - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller. - reg: Base address of the pin controller hardware module and length of diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c index 155b1b3..9a93df6 100644 --- a/drivers/pinctrl/pinctrl-exynos.c +++ b/drivers/pinctrl/pinctrl-exynos.c @@ -1042,6 +1042,88 @@ struct samsung_pin_ctrl exynos5250_pin_ctrl[] = { }, }; +/* pin banks of exynos5260 pin-controller 0 */ +static struct samsung_pin_bank exynos5260_pin_banks0[] = { + EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpa0", 0x00), + EXYNOS_PIN_BANK_EINTG(7, 0x020, "gpa1", 0x04), + EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08), + EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpb0", 0x0c), + EXYNOS_PIN_BANK_EINTG(4, 0x080, "gpb1", 0x10), + EXYNOS_PIN_BANK_EINTG(5, 0x0A0, "gpb2", 0x14), + EXYNOS_PIN_BANK_EINTG(8, 0x0C0, "gpb3", 0x18), + EXYNOS_PIN_BANK_EINTG(8, 0x0E0, "gpb4", 0x1c), + EXYNOS_PIN_BANK_EINTG(8, 0x100, "gpb5", 0x20), + EXYNOS_PIN_BANK_EINTG(8, 0x120, "gpd0", 0x24), + EXYNOS_PIN_BANK_EINTG(7, 0x140, "gpd1", 0x28), + EXYNOS_PIN_BANK_EINTG(5, 0x160, "gpd2", 0x2c), + EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpe0", 0x30), + EXYNOS_PIN_BANK_EINTG(5, 0x1A0, "gpe1", 0x34), + EXYNOS_PIN_BANK_EINTG(4, 0x1C0, "gpf0", 0x38), + EXYNOS_PIN_BANK_EINTG(8, 0x1E0, "gpf1", 0x3c), + EXYNOS_PIN_BANK_EINTG(2, 0x200, "gpk0", 0x40), + EXYNOS_PIN_BANK_EINTW(8, 0xC00, "gpx0", 0x00), + EXYNOS_PIN_BANK_EINTW(8, 0xC20, "gpx1", 0x04), + EXYNOS_PIN_BANK_EINTW(8, 0xC40, "gpx2", 0x08), + EXYNOS_PIN_BANK_EINTW(8, 0xC60, "gpx3", 0x0c), +}; + +/* pin banks of exynos5260 pin-controller 1 */ +static struct samsung_pin_bank exynos5260_pin_banks1[] = { + EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpc0", 0x00), + EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpc1", 0x04), + EXYNOS_PIN_BANK_EINTG(7, 0x040, "gpc2", 0x08), + EXYNOS_PIN_BANK_EINTG(4, 0x060, "gpc3", 0x0c), + EXYNOS_PIN_BANK_EINTG(4, 0x080, "gpc4", 0x10), +}; + +/* pin banks of exynos5260 pin-controller 2 */ +static struct samsung_pin_bank exynos5260_pin_banks2[] = { + EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00), + EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04), +}; + +/* + * Samsung pinctrl driver data for Exynos5260 SoC. Exynos5420 SoC includes + * four gpio/pin-mux/pinconfig controllers. + */ +struct samsung_pin_ctrl exynos5260_pin_ctrl[] = { + { + /* pin-controller instance 0 data */ + .pin_banks = exynos5260_pin_banks0, + .nr_banks = ARRAY_SIZE(exynos5260_pin_banks0), + .geint_con = EXYNOS_GPIO_ECON_OFFSET, + .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, + .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, + .weint_con = EXYNOS_WKUP_ECON_OFFSET, + .weint_mask = EXYNOS_WKUP_EMASK_OFFSET, + .weint_pend = EXYNOS_WKUP_EPEND_OFFSET, + .svc = EXYNOS_SVC_OFFSET, + .eint_gpio_init = exynos_eint_gpio_init, + .eint_wkup_init = exynos_eint_wkup_init, + .label = "exynos5260-gpio-ctrl0", + }, { + /* pin-controller instance 1 data */ + .pin_banks = exynos5260_pin_banks1, + .nr_banks = ARRAY_SIZE(exynos5260_pin_banks1), + .geint_con = EXYNOS_GPIO_ECON_OFFSET, + .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, + .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, + .svc = EXYNOS_SVC_OFFSET, + .eint_gpio_init = exynos_eint_gpio_init, + .label = "exynos5260-gpio-ctrl1", + }, { + /* pin-controller instance 2 data */ + .pin_banks = exynos5260_pin_banks2, + .nr_banks = ARRAY_SIZE(exynos5260_pin_banks2), + .geint_con = EXYNOS_GPIO_ECON_OFFSET, + .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, + .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, + .svc = EXYNOS_SVC_OFFSET, + .eint_gpio_init = exynos_eint_gpio_init, + .label = "exynos5260-gpio-ctrl2", + }, +}; + /* pin banks of exynos5420 pin-controller 0 */ static struct samsung_pin_bank exynos5420_pin_banks0[] = { EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpy7", 0x00), diff --git a/drivers/pinctrl/pinctrl-samsung.c b/drivers/pinctrl/pinctrl-samsung.c index 47ec2e8..0324d4c 100644 --- a/drivers/pinctrl/pinctrl-samsung.c +++ b/drivers/pinctrl/pinctrl-samsung.c @@ -1120,6 +1120,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = { .data = (void *)exynos4x12_pin_ctrl }, { .compatible = "samsung,exynos5250-pinctrl", .data = (void *)exynos5250_pin_ctrl }, + { .compatible = "samsung,exynos5260-pinctrl", + .data = (void *)exynos5260_pin_ctrl }, { .compatible = "samsung,exynos5420-pinctrl", .data = (void *)exynos5420_pin_ctrl }, { .compatible = "samsung,s5pv210-pinctrl", diff --git a/drivers/pinctrl/pinctrl-samsung.h b/drivers/pinctrl/pinctrl-samsung.h index 30622d9..bab9c21 100644 --- a/drivers/pinctrl/pinctrl-samsung.h +++ b/drivers/pinctrl/pinctrl-samsung.h @@ -254,6 +254,7 @@ struct samsung_pmx_func { extern struct samsung_pin_ctrl exynos4210_pin_ctrl[]; extern struct samsung_pin_ctrl exynos4x12_pin_ctrl[]; extern struct samsung_pin_ctrl exynos5250_pin_ctrl[]; +extern struct samsung_pin_ctrl exynos5260_pin_ctrl[]; extern struct samsung_pin_ctrl exynos5420_pin_ctrl[]; extern struct samsung_pin_ctrl s3c64xx_pin_ctrl[]; extern struct samsung_pin_ctrl s3c2412_pin_ctrl[];