| Message ID | 1386345391-23482-4-git-send-email-rahul.sharma@samsung.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Pankaj, Rahul, Arun, Please split generic SoC dtsi files and board dts files into separate patches. Also please see my comments inline. On Friday 06 of December 2013 21:26:27 Rahul Sharma wrote: > From: Arun Kumar K <arun.kk@samsung.com> > > The patch adds the dts files for exynos5260 and for xyref > evt0 board. [snip] > + gpx0: gpx0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; Just to make sure, all your GPX banks are muxed type, with wake-up interrupts muxed to a single GIC interrupt line, right? > + }; [snip] > + cam_gpio_a: cam-gpio-a { > + samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", > + "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", > + "gpe1-0", "gpe1-1"; > + samsung,pin-function = <2>; Incorrect indentation. > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; [snip] > + hdmi_hpd_irq: hdmi-hpd-irq { > + samsung,pins = "gpx3-7"; > + samsung,pin-function = <0>; Function 0 is input, not a special function. It shouldn't be handled this way. If a board needs to set up pull-up/down and driver strength for GPIO pins then it should add its own board-specific pinconf nodes with just pin-pud and/or pin-drv properties and without pin-function. > + samsung,pin-pud = <1>; > + samsung,pin-drv = <0>; > + }; > + }; [snip] > + sd0_bus1: sd0-bus-width1 { > + samsung,pins = "gpc0-3"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <3>; > + }; > + > + sd0_bus4: sd0-bus-width4 { > + samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", "gpc0-6"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <3>; > + }; > + > + sd0_bus8: sd0-bus-width8 { > + samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <3>; > + }; This is inconsistent. To specify 1- and 4-bit SD busses you need to include reference to just one pinconf node (sd0_bus1 or sd0_bus4), but for 8-bit bus you need to specify both sd0_bus4 and sd0_bus8. Please make the nodes exclusive, so you always need to specify all possible configurations with given wiring (e.g. with 4 wires, you can run in 1-bit and 4-bit modes, not just 4-bit). Same for remaining instances of SD bus. [snip] > diff --git a/arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts b/arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts > new file mode 100644 > index 0000000..aa1fcda > --- /dev/null > +++ b/arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts > @@ -0,0 +1,85 @@ > +/* > + * SAMSUNG XYREF5260 EVT0 board device tree source > + * > + * Copyright (c) 2013 Samsung Electronics Co., Ltd. > + * http://www.samsung.com > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > +*/ > + > +/dts-v1/; > +#include "exynos5260.dtsi" > + > +/ { > + model = "SAMSUNG XYREF5260 EVT0 board based on EXYNOS5260"; > + compatible = "samsung,xyref5260", "samsung,exynos5260"; > + Shouldn't you have a memory node here? > + chosen { > + bootargs = "console=ttySAC2,115200"; > + }; > + > + fixed-rate-clocks { > + oscclk { > + compatible = "samsung,exynos5260-oscclk"; > + clock-frequency = <24000000>; > + }; > + }; Please use generic fixed clock bindings. You can take [1] as an example how to use them. [1] arch/arm/boot/dts/s3c6410-smdk6410.dtsi > + > + serial@12C00000 { > + status = "okay"; > + }; > + > + serial@12C10000 { > + status = "okay"; > + }; > + > + serial@12C20000 { > + status = "okay"; > + }; > + > + serial@12860000 { Is it the correct UART address? It seems a bit off compared to addresses of other ports. > + status = "okay"; > + }; > + > + dwmmc0@12140000 { > + status = "okay"; > + num-slots = <1>; > + broken-cd; > + bypass-smu; This is not a valid property, according to binding documentation. > + supports-highspeed; > + supports-hs200-mode; /* 200 Mhz */ Neither is this one. > + fifo-depth = <0x40>; This is a property of the SoC, not the board. > + card-detect-delay = <200>; > + samsung,dw-mshc-ciu-div = <3>; > + samsung,dw-mshc-sdr-timing = <0 4>; > + samsung,dw-mshc-ddr-timing = <0 2>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; > + > + slot@0 { > + reg = <0>; > + bus-width = <8>; > + }; > + }; > + > + dwmmc2@12160000 { > + status = "okay"; > + num-slots = <1>; > + supports-highspeed; > + fifo-depth = <0x40>; See above. > + card-detect-delay = <200>; > + samsung,dw-mshc-ciu-div = <3>; > + samsung,dw-mshc-sdr-timing = <2 3>; > + samsung,dw-mshc-ddr-timing = <1 2>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; > + > + slot@0 { > + reg = <0>; > + bus-width = <4>; > + disable-wp; > + }; > + }; > +}; > diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi > new file mode 100644 > index 0000000..fcb8d4f > --- /dev/null > +++ b/arch/arm/boot/dts/exynos5260.dtsi > @@ -0,0 +1,315 @@ > +/* > + * SAMSUNG EXYNOS5260 SoC device tree source > + * > + * Copyright (c) 2013 Samsung Electronics Co., Ltd. > + * http://www.samsung.com > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > +*/ > + > +#include "skeleton.dtsi" > +#include "exynos5260-pinctrl.dtsi" > + > +#include <dt-bindings/clk/exynos5260-clk.h> This won't compile, because this file hasn't been added yet by previous patches. Isn't it possible to reuse some of the definitions from exynos5.dtsi? How much different is this SoC from other SoCs from the series? > + > +/ { > + compatible = "samsung,exynos5260"; > + interrupt-parent = <&gic>; > + > + aliases { > + pinctrl0 = &pinctrl_0; > + pinctrl1 = &pinctrl_1; > + pinctrl2 = &pinctrl_2; > + }; > + > + chipid@10000000 { > + compatible = "samsung,exynos4210-chipid"; > + reg = <0x10000000 0x100>; > + }; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a15"; > + reg = <0>; > + cci-control-port = <&cci_control1>; > + }; > + cpu@1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a15"; > + reg = <1>; > + cci-control-port = <&cci_control1>; > + }; > + cpu@2 { @unit-address suffix must match the first entry of reg property. > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x100>; > + cci-control-port = <&cci_control0>; > + }; > + cpu@3 { Ditto. > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x101>; > + cci-control-port = <&cci_control0>; > + }; > + cpu@4 { Ditto. > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x102>; > + cci-control-port = <&cci_control0>; > + }; > + cpu@5 { Ditto. > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x103>; > + cci-control-port = <&cci_control0>; > + }; > + }; > + > + cmus { You need compatible = "simple-bus" here if you need the nodes below to be instantiated. However I'm not sure if there is a point in placing them inside a simple-bus. This needs more thought, so please give me a bit more time to think over this and patches 4 and 7. > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + > + cmu_top: clock-controller@0x10010000 { coding style: There should be no 0x prefix in @unit-address suffix. + all the CMU instances below. [snip] > + > + gic:interrupt-controller@10481000 { coding style: There should be a space after the colon ending the label. > + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; > + #interrupt-cells = <3>; > + #address-cells = <0>; > + #size-cells = <0>; > + interrupt-controller; > + reg = <0x10481000 0x1000>, > + <0x10482000 0x1000>, > + <0x10484000 0x2000>, > + <0x10486000 0x2000>; > + interrupts = <1 9 0xf04>; > + }; > + > + mct@100B0000 { > + compatible = "samsung,exynos4210-mct"; > + reg = <0x100B0000 0xb00>; nit: Inconsistent hexadecimal character case, on Exynos in dts* files upper case should be used. Also the reg size looks a bit suspicious, as it's not even page aligned. Is it the whole area used by the MCT block, not just the used registers? > + interrupt-controller; MCT is not an interrupt controller. > + #interrups-cells = <2>; Ditto. This is a property specific to interrupt controllers. > + interrupt-parent = <&mct_map>; > + interrupts = <0 0>, <1 0>, <2 0>, <3 0>, > + <4 0>, <5 0>, <6 0>, <7 0>, > + <8 0>, <9 0>, <10 0>, <11 0>; > + clocks = <&cmu_top FIN_PLL>, <&cmu_peri PERI_PCLK_MCT>; > + clock-names = "fin_pll", "mct"; > + > + mct_map: mct-map { > + #interrupt-cells = <2>; Why two cells are needed? Using just one woudl simplify interrupt specifiers above and interrupt-map specifiers below. > + #address-cells = <0>; > + #size-cells = <0>; > + interrupt-map = <0x0 0 &gic 0 104 0>, > + <0x1 0 &gic 0 105 0>, > + <0x2 0 &gic 0 106 0>, > + <0x3 0 &gic 0 107 0>, > + <0x4 0 &gic 0 122 0>, > + <0x5 0 &gic 0 123 0>, > + <0x6 0 &gic 0 124 0>, > + <0x7 0 &gic 0 125 0>, > + <0x8 0 &gic 0 126 0>, > + <0x9 0 &gic 0 127 0>, > + <0xa 0 &gic 0 128 0>, > + <0xb 0 &gic 0 129 0>; > + }; > + }; > + > + cci@10F00000 { > + compatible = "arm,cci-400"; > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0x10F00000 0x1000>; > + ranges = <0x0 0x10F00000 0x6000>; > + > + cci_control0: slave-if@4000 { /* Please check again */ Huh? Please check again and send correct data. > + compatible = "arm,cci-400-ctrl-if"; > + interface-type = "ace"; > + reg = <0x4000 0x1000>; /* Please check again */ > + }; > + > + cci_control1: slave-if@5000 { /* Please check again */ > + compatible = "arm,cci-400-ctrl-if"; > + interface-type = "ace"; > + reg = <0x5000 0x1000>; /* Please check again */ > + }; > + }; > + > + pinctrl_0: pinctrl@11600000 { > + compatible = "samsung,exynos5260-pinctrl"; > + reg = <0x11600000 0x1000>; > + interrupts = <0 79 0>; /* GPIO_RT */ Instead of using such comment, maybe it would be better to rename labels of pinctrl nodes to be more meaningful, such as pinctrl_rt, pinctrl_fsys and pinctrl_aud? > + > + wakeup-interrupt-controller { > + compatible = "samsung,exynos4210-wakeup-eint"; > + interrupt-parent = <&gic>; > + interrupts = <0 32 0>; > + }; > + }; [snip] > + > + dwmmc_0: dwmmc0@12140000 { Please use generic "mmc@" names for MMC nodes and move fifo-depth property here to SoC-level dtsi. Best regards, Tomasz
Hi Tomasz, On 10 December 2013 22:40, Tomasz Figa <t.figa@samsung.com> wrote: > Hi Pankaj, Rahul, Arun, > > Please split generic SoC dtsi files and board dts files into separate > patches. Also please see my comments inline. I will split them to SoC and Board DT patches. > > On Friday 06 of December 2013 21:26:27 Rahul Sharma wrote: >> From: Arun Kumar K <arun.kk@samsung.com> >> >> The patch adds the dts files for exynos5260 and for xyref >> evt0 board. > [snip] >> + gpx0: gpx0 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; > > Just to make sure, all your GPX banks are muxed type, with wake-up > interrupts muxed to a single GIC interrupt line, right? There is no combiner in 5260. Each GPX bank is connected one GIC interrupt line. > >> + }; > [snip] >> + cam_gpio_a: cam-gpio-a { >> + samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", >> + "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", >> + "gpe1-0", "gpe1-1"; >> + samsung,pin-function = <2>; > > Incorrect indentation. > Done. >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; > [snip] >> + hdmi_hpd_irq: hdmi-hpd-irq { >> + samsung,pins = "gpx3-7"; >> + samsung,pin-function = <0>; > > Function 0 is input, not a special function. It shouldn't be handled > this way. If a board needs to set up pull-up/down and driver strength > for GPIO pins then it should add its own board-specific pinconf nodes > with just pin-pud and/or pin-drv properties and without pin-function. I moved this node to Board file. I hope that is correct. > >> + samsung,pin-pud = <1>; >> + samsung,pin-drv = <0>; >> + }; >> + }; > [snip] >> + sd0_bus1: sd0-bus-width1 { >> + samsung,pins = "gpc0-3"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd0_bus4: sd0-bus-width4 { >> + samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", "gpc0-6"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd0_bus8: sd0-bus-width8 { >> + samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; > > This is inconsistent. To specify 1- and 4-bit SD busses you need to > include reference to just one pinconf node (sd0_bus1 or sd0_bus4), but > for 8-bit bus you need to specify both sd0_bus4 and sd0_bus8. > > Please make the nodes exclusive, so you always need to specify all > possible configurations with given wiring (e.g. with 4 wires, you can > run in 1-bit and 4-bit modes, not just 4-bit). > Ok. I will remove "gpc0-3" from sdX_bus4. > Same for remaining instances of SD bus. > > [snip] > >> diff --git a/arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts b/arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts >> new file mode 100644 >> index 0000000..aa1fcda >> --- /dev/null >> +++ b/arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts >> @@ -0,0 +1,85 @@ >> +/* >> + * SAMSUNG XYREF5260 EVT0 board device tree source >> + * >> + * Copyright (c) 2013 Samsung Electronics Co., Ltd. >> + * http://www.samsung.com >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> +*/ >> + >> +/dts-v1/; >> +#include "exynos5260.dtsi" >> + >> +/ { >> + model = "SAMSUNG XYREF5260 EVT0 board based on EXYNOS5260"; >> + compatible = "samsung,xyref5260", "samsung,exynos5260"; >> + > > Shouldn't you have a memory node here? I added memory node here. > >> + chosen { >> + bootargs = "console=ttySAC2,115200"; >> + }; >> + >> + fixed-rate-clocks { >> + oscclk { >> + compatible = "samsung,exynos5260-oscclk"; >> + clock-frequency = <24000000>; >> + }; >> + }; > > Please use generic fixed clock bindings. You can take [1] as an example > how to use them. > > [1] arch/arm/boot/dts/s3c6410-smdk6410.dtsi Ok. I will changes this. > >> + >> + serial@12C00000 { >> + status = "okay"; >> + }; >> + >> + serial@12C10000 { >> + status = "okay"; >> + }; >> + >> + serial@12C20000 { >> + status = "okay"; >> + }; >> + >> + serial@12860000 { > > Is it the correct UART address? It seems a bit off compared to addresses > of other ports. > This is correct. >> + status = "okay"; >> + }; >> + >> + dwmmc0@12140000 { >> + status = "okay"; >> + num-slots = <1>; >> + broken-cd; >> + bypass-smu; > > This is not a valid property, according to binding documentation. > >> + supports-highspeed; >> + supports-hs200-mode; /* 200 Mhz */ > > Neither is this one. > >> + fifo-depth = <0x40>; > > This is a property of the SoC, not the board. > >> + card-detect-delay = <200>; >> + samsung,dw-mshc-ciu-div = <3>; >> + samsung,dw-mshc-sdr-timing = <0 4>; >> + samsung,dw-mshc-ddr-timing = <0 2>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; >> + >> + slot@0 { >> + reg = <0>; >> + bus-width = <8>; >> + }; >> + }; >> + >> + dwmmc2@12160000 { >> + status = "okay"; >> + num-slots = <1>; >> + supports-highspeed; >> + fifo-depth = <0x40>; > > See above. I will remove them. These are optional properties which are not being referred in the mainline driver. > >> + card-detect-delay = <200>; >> + samsung,dw-mshc-ciu-div = <3>; >> + samsung,dw-mshc-sdr-timing = <2 3>; >> + samsung,dw-mshc-ddr-timing = <1 2>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; >> + >> + slot@0 { >> + reg = <0>; >> + bus-width = <4>; >> + disable-wp; >> + }; >> + }; >> +}; >> diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi >> new file mode 100644 >> index 0000000..fcb8d4f >> --- /dev/null >> +++ b/arch/arm/boot/dts/exynos5260.dtsi >> @@ -0,0 +1,315 @@ >> +/* >> + * SAMSUNG EXYNOS5260 SoC device tree source >> + * >> + * Copyright (c) 2013 Samsung Electronics Co., Ltd. >> + * http://www.samsung.com >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> +*/ >> + >> +#include "skeleton.dtsi" >> +#include "exynos5260-pinctrl.dtsi" >> + >> +#include <dt-bindings/clk/exynos5260-clk.h> > > This won't compile, because this file hasn't been added yet by previous > patches. > I will reorder the patches to ensure build doesn't break. > Isn't it possible to reuse some of the definitions from exynos5.dtsi? How > much different is this SoC from other SoCs from the series? It is quite different than other Exynos5 SoCs specially the physical address of the IPs. > >> + >> +/ { >> + compatible = "samsung,exynos5260"; >> + interrupt-parent = <&gic>; >> + >> + aliases { >> + pinctrl0 = &pinctrl_0; >> + pinctrl1 = &pinctrl_1; >> + pinctrl2 = &pinctrl_2; >> + }; >> + >> + chipid@10000000 { >> + compatible = "samsung,exynos4210-chipid"; >> + reg = <0x10000000 0x100>; >> + }; >> + >> + cpus { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + cpu@0 { >> + device_type = "cpu"; >> + compatible = "arm,cortex-a15"; >> + reg = <0>; >> + cci-control-port = <&cci_control1>; >> + }; >> + cpu@1 { >> + device_type = "cpu"; >> + compatible = "arm,cortex-a15"; >> + reg = <1>; >> + cci-control-port = <&cci_control1>; >> + }; >> + cpu@2 { > > @unit-address suffix must match the first entry of reg property. Ok. I will change this. > >> + device_type = "cpu"; >> + compatible = "arm,cortex-a7"; >> + reg = <0x100>; >> + cci-control-port = <&cci_control0>; >> + }; >> + cpu@3 { > > Ditto. > >> + device_type = "cpu"; >> + compatible = "arm,cortex-a7"; >> + reg = <0x101>; >> + cci-control-port = <&cci_control0>; >> + }; >> + cpu@4 { > > Ditto. > >> + device_type = "cpu"; >> + compatible = "arm,cortex-a7"; >> + reg = <0x102>; >> + cci-control-port = <&cci_control0>; >> + }; >> + cpu@5 { > > Ditto. > >> + device_type = "cpu"; >> + compatible = "arm,cortex-a7"; >> + reg = <0x103>; >> + cci-control-port = <&cci_control0>; >> + }; >> + }; >> + >> + cmus { > > You need compatible = "simple-bus" here if you need the nodes below > to be instantiated. > > However I'm not sure if there is a point in placing them inside > a simple-bus. This needs more thought, so please give me a bit > more time to think over this and patches 4 and 7. Please let me know if you have a better solution. > >> + #address-cells = <1>; >> + #size-cells = <1>; >> + ranges; >> + >> + cmu_top: clock-controller@0x10010000 { > > coding style: There should be no 0x prefix in @unit-address suffix. ok. Done. > + all the CMU instances below. > > [snip] >> + >> + gic:interrupt-controller@10481000 { > > coding style: There should be a space after the colon ending the label. > Done. >> + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; >> + #interrupt-cells = <3>; >> + #address-cells = <0>; >> + #size-cells = <0>; >> + interrupt-controller; >> + reg = <0x10481000 0x1000>, >> + <0x10482000 0x1000>, >> + <0x10484000 0x2000>, >> + <0x10486000 0x2000>; >> + interrupts = <1 9 0xf04>; >> + }; >> + >> + mct@100B0000 { >> + compatible = "samsung,exynos4210-mct"; >> + reg = <0x100B0000 0xb00>; > > nit: Inconsistent hexadecimal character case, on Exynos in dts* files > upper case should be used. > > Also the reg size looks a bit suspicious, as it's not even page aligned. > Is it the whole area used by the MCT block, not just the used registers? > Done. >> + interrupt-controller; > > MCT is not an interrupt controller. > >> + #interrups-cells = <2>; > > Ditto. This is a property specific to interrupt controllers. > >> + interrupt-parent = <&mct_map>; >> + interrupts = <0 0>, <1 0>, <2 0>, <3 0>, >> + <4 0>, <5 0>, <6 0>, <7 0>, >> + <8 0>, <9 0>, <10 0>, <11 0>; >> + clocks = <&cmu_top FIN_PLL>, <&cmu_peri PERI_PCLK_MCT>; >> + clock-names = "fin_pll", "mct"; >> + >> + mct_map: mct-map { >> + #interrupt-cells = <2>; > > Why two cells are needed? Using just one woudl simplify interrupt > specifiers above and interrupt-map specifiers below. > Done. >> + #address-cells = <0>; >> + #size-cells = <0>; >> + interrupt-map = <0x0 0 &gic 0 104 0>, >> + <0x1 0 &gic 0 105 0>, >> + <0x2 0 &gic 0 106 0>, >> + <0x3 0 &gic 0 107 0>, >> + <0x4 0 &gic 0 122 0>, >> + <0x5 0 &gic 0 123 0>, >> + <0x6 0 &gic 0 124 0>, >> + <0x7 0 &gic 0 125 0>, >> + <0x8 0 &gic 0 126 0>, >> + <0x9 0 &gic 0 127 0>, >> + <0xa 0 &gic 0 128 0>, >> + <0xb 0 &gic 0 129 0>; >> + }; >> + }; >> + >> + cci@10F00000 { >> + compatible = "arm,cci-400"; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + reg = <0x10F00000 0x1000>; >> + ranges = <0x0 0x10F00000 0x6000>; >> + >> + cci_control0: slave-if@4000 { /* Please check again */ > > Huh? Please check again and send correct data. > >> + compatible = "arm,cci-400-ctrl-if"; >> + interface-type = "ace"; >> + reg = <0x4000 0x1000>; /* Please check again */ >> + }; >> + >> + cci_control1: slave-if@5000 { /* Please check again */ >> + compatible = "arm,cci-400-ctrl-if"; >> + interface-type = "ace"; >> + reg = <0x5000 0x1000>; /* Please check again */ >> + }; >> + }; >> + >> + pinctrl_0: pinctrl@11600000 { >> + compatible = "samsung,exynos5260-pinctrl"; >> + reg = <0x11600000 0x1000>; >> + interrupts = <0 79 0>; /* GPIO_RT */ > > Instead of using such comment, maybe it would be better to rename > labels of pinctrl nodes to be more meaningful, such as pinctrl_rt, > pinctrl_fsys and pinctrl_aud? I removed the comments. > >> + >> + wakeup-interrupt-controller { >> + compatible = "samsung,exynos4210-wakeup-eint"; >> + interrupt-parent = <&gic>; >> + interrupts = <0 32 0>; >> + }; >> + }; > [snip] >> + >> + dwmmc_0: dwmmc0@12140000 { > > Please use generic "mmc@" names for MMC nodes and move fifo-depth property > here to SoC-level dtsi. Done. Regards, Rahul Sharma. > > Best regards, > Tomasz >
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 741bf73..8d26135 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -63,6 +63,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ exynos5250-arndale.dtb \ exynos5250-smdk5250.dtb \ exynos5250-snow.dtb \ + exynos5260-xyref5260-evt0.dtb \ exynos5420-smdk5420.dtb \ exynos5440-sd5v1.dtb \ exynos5440-ssdk5440.dtb diff --git a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi new file mode 100644 index 0000000..67aaee7 --- /dev/null +++ b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi @@ -0,0 +1,586 @@ +/* + * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device + * tree nodes are listed in this file. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/ { + pinctrl@11600000 { + gpa0: gpa0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa1: gpa1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa2: gpa2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb0: gpb0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb1: gpb1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb2: gpb2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb3: gpb3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb4: gpb4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb5: gpb5 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd0: gpd0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd1: gpd1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd2: gpd2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe0: gpe0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe1: gpe1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf0: gpf0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk0: gpk0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpx0: gpx0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpx1: gpx1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpx2: gpx2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpx3: gpx3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + uart0_data: uart0-data { + samsung,pins = "gpa0-0", "gpa0-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart0_fctl: uart0-fctl { + samsung,pins = "gpa0-2", "gpa0-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart1_data: uart1-data { + samsung,pins = "gpa1-0", "gpa1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart1_fctl: uart1-fctl { + samsung,pins = "gpa1-2", "gpa1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart2_data: uart2-data { + samsung,pins = "gpa1-4", "gpa1-5"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + spi0_bus: spi0-bus { + samsung,pins = "gpa2-0", "gpa2-1", "gpa2-2", "gpa2-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + spi1_bus: spi1-bus { + samsung,pins = "gpa2-5", "gpa2-6", "gpa2-7"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + usb3_vbus0_en: usb3-vbus0-en { + samsung,pins = "gpa2-4"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + i2s1_bus: i2s1-bus { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", + "gpb0-4"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pcm1_bus: pcm1-bus { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", + "gpb0-4"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + spdif1_bus: spdif1-bus { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2"; + samsung,pin-function = <4>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + spi2_bus: spi2-bus { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c0_hs_bus: i2c0-hs-bus { + samsung,pins = "gpb3-0", "gpb3-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c1_hs_bus: i2c1-hs-bus { + samsung,pins = "gpb3-2", "gpb3-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c2_hs_bus: i2c2-hs-bus { + samsung,pins = "gpb3-4", "gpb3-5"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c3_hs_bus: i2c3-hs-bus { + samsung,pins = "gpb3-6", "gpb3-7"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c4_bus: i2c4-bus { + samsung,pins = "gpb4-0", "gpb4-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c5_bus: i2c5-bus { + samsung,pins = "gpb4-2", "gpb4-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c6_bus: i2c6-bus { + samsung,pins = "gpb4-4", "gpb4-5"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c7_bus: i2c7-bus { + samsung,pins = "gpb4-6", "gpb4-7"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c8_bus: i2c8-bus { + samsung,pins = "gpb5-0", "gpb5-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c9_bus: i2c9-bus { + samsung,pins = "gpb5-2", "gpb5-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c10_bus: i2c10-bus { + samsung,pins = "gpb5-4", "gpb5-5"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c11_bus: i2c11-bus { + samsung,pins = "gpb5-6", "gpb5-7"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + cam_gpio_a: cam-gpio-a { + samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", + "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", + "gpe1-0", "gpe1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + cam_gpio_b: cam-gpio-b { + samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3", + "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + cam_i2c1_bus: cam-i2c1-bus { + samsung,pins = "gpf0-2", "gpf0-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + cam_i2c0_bus: cam-i2c0-bus { + samsung,pins = "gpf0-0", "gpf0-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + cam_spi0_bus: cam-spi0-bus { + samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + cam_spi1_bus: cam-spi1-bus { + samsung,pins = "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + hdmi_hpd_irq: hdmi-hpd-irq { + samsung,pins = "gpx3-7"; + samsung,pin-function = <0>; + samsung,pin-pud = <1>; + samsung,pin-drv = <0>; + }; + }; + + pinctrl@12290000 { + gpc0: gpc0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc1: gpc1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc2: gpc2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc3: gpc3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc4: gpc4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + sd0_clk: sd0-clk { + samsung,pins = "gpc0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd0_cmd: sd0-cmd { + samsung,pins = "gpc0-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd0_cd: sd0-cd { + samsung,pins = "gpc0-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd0_bus1: sd0-bus-width1 { + samsung,pins = "gpc0-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd0_bus4: sd0-bus-width4 { + samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", "gpc0-6"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd0_bus8: sd0-bus-width8 { + samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd1_clk: sd1-clk { + samsung,pins = "gpc1-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd1_cmd: sd1-cmd { + samsung,pins = "gpc1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd1_cd: sd1-cd { + samsung,pins = "gpc1-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd1_bus1: sd1-bus-width1 { + samsung,pins = "gpc1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd1_bus4: sd1-bus-width4 { + samsung,pins = "gpc1-3", "gpc1-4", "gpc1-5"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd1_bus8: sd1-bus-width8 { + samsung,pins = "gpc4-0", "gpc4-1", "gpc4-2", "gpc4-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd2_clk: sd2-clk { + samsung,pins = "gpc2-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd2_cmd: sd2-cmd { + samsung,pins = "gpc2-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd2_cd: sd2-cd { + samsung,pins = "gpc2-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd2_bus1: sd2-bus-width1 { + samsung,pins = "gpc2-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd2_bus4: sd2-bus-width4 { + samsung,pins = "gpc2-3", "gpc2-4", "gpc2-5", "gpc2-6"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + }; + + pinctrl@128B0000 { + gpz0: gpz0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpz1: gpz1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; diff --git a/arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts b/arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts new file mode 100644 index 0000000..aa1fcda --- /dev/null +++ b/arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts @@ -0,0 +1,85 @@ +/* + * SAMSUNG XYREF5260 EVT0 board device tree source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +#include "exynos5260.dtsi" + +/ { + model = "SAMSUNG XYREF5260 EVT0 board based on EXYNOS5260"; + compatible = "samsung,xyref5260", "samsung,exynos5260"; + + chosen { + bootargs = "console=ttySAC2,115200"; + }; + + fixed-rate-clocks { + oscclk { + compatible = "samsung,exynos5260-oscclk"; + clock-frequency = <24000000>; + }; + }; + + serial@12C00000 { + status = "okay"; + }; + + serial@12C10000 { + status = "okay"; + }; + + serial@12C20000 { + status = "okay"; + }; + + serial@12860000 { + status = "okay"; + }; + + dwmmc0@12140000 { + status = "okay"; + num-slots = <1>; + broken-cd; + bypass-smu; + supports-highspeed; + supports-hs200-mode; /* 200 Mhz */ + fifo-depth = <0x40>; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <0 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; + + slot@0 { + reg = <0>; + bus-width = <8>; + }; + }; + + dwmmc2@12160000 { + status = "okay"; + num-slots = <1>; + supports-highspeed; + fifo-depth = <0x40>; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; + + slot@0 { + reg = <0>; + bus-width = <4>; + disable-wp; + }; + }; +}; diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi new file mode 100644 index 0000000..fcb8d4f --- /dev/null +++ b/arch/arm/boot/dts/exynos5260.dtsi @@ -0,0 +1,315 @@ +/* + * SAMSUNG EXYNOS5260 SoC device tree source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include "skeleton.dtsi" +#include "exynos5260-pinctrl.dtsi" + +#include <dt-bindings/clk/exynos5260-clk.h> + +/ { + compatible = "samsung,exynos5260"; + interrupt-parent = <&gic>; + + aliases { + pinctrl0 = &pinctrl_0; + pinctrl1 = &pinctrl_1; + pinctrl2 = &pinctrl_2; + }; + + chipid@10000000 { + compatible = "samsung,exynos4210-chipid"; + reg = <0x10000000 0x100>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0>; + cci-control-port = <&cci_control1>; + }; + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <1>; + cci-control-port = <&cci_control1>; + }; + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x100>; + cci-control-port = <&cci_control0>; + }; + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x101>; + cci-control-port = <&cci_control0>; + }; + cpu@4 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x102>; + cci-control-port = <&cci_control0>; + }; + cpu@5 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x103>; + cci-control-port = <&cci_control0>; + }; + }; + + cmus { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + cmu_top: clock-controller@0x10010000 { + compatible = "exynos5260-cmu-top", + "samsung,exynos5260-clock"; + reg = <0x10010000 0x10000>; + #clock-cells = <1>; + }; + + cmu_peri: clock-controller@0x10200000 { + compatible = "exynos5260-cmu-peri", "samsung,exynos5260-clock"; + reg = <0x10200000 0x10000>; + #clock-cells = <1>; + }; + + cmu_egl: clock-controller@0x10600000 { + compatible = "exynos5260-cmu-egl", "samsung,exynos5260-clock"; + reg = <0x10600000 0x10000>; + #clock-cells = <1>; + }; + + cmu_kfc: clock-controller@0x10700000 { + compatible = "exynos5260-cmu-kfc", "samsung,exynos5260-clock"; + reg = <0x10700000 0x10000>; + #clock-cells = <1>; + }; + + cmu_g2d: clock-controller@0x10A00000 { + compatible = "exynos5260-cmu-g2d", "samsung,exynos5260-clock"; + reg = <0x10A00000 0x10000>; + #clock-cells = <1>; + }; + + cmu_mif: clock-controller@0x10CE0000 { + compatible = "exynos5260-cmu-mif", "samsung,exynos5260-clock"; + reg = <0x10CE0000 0x10000>; + #clock-cells = <1>; + }; + + cmu_mfc: clock-controller@0x11090000 { + compatible = "exynos5260-cmu-mfc", "samsung,exynos5260-clock"; + reg = <0x11090000 0x10000>; + #clock-cells = <1>; + }; + + cmu_g3d: clock-controller@0x11830000 { + compatible = "exynos5260-cmu-g3d", "samsung,exynos5260-clock"; + reg = <0x11830000 0x10000>; + #clock-cells = <1>; + }; + + cmu_fsys: clock-controller@0x122E0000 { + compatible = "exynos5260-cmu-fsys", "samsung,exynos5260-clock"; + reg = <0x122E0000 0x10000>; + #clock-cells = <1>; + }; + + cmu_aud: clock-controller@0x128C0000 { + compatible = "exynos5260-cmu-aud", "samsung,exynos5260-clock"; + reg = <0x128C0000 0x10000>; + #clock-cells = <1>; + }; + + cmu_isp: clock-controller@0x133C0000 { + compatible = "exynos5260-cmu-isp", "samsung,exynos5260-clock"; + reg = <0x133C0000 0x10000>; + #clock-cells = <1>; + }; + + cmu_gscl: clock-controller@0x13F00000 { + compatible = "exynos5260-cmu-gscl", "samsung,exynos5260-clock"; + reg = <0x13F00000 0x10000>; + #clock-cells = <1>; + }; + + cmu_disp: clock-controller@0x14550000 { + compatible = "exynos5260-cmu-disp", "samsung,exynos5260-clock"; + reg = <0x14550000 0x10000>; + #clock-cells = <1>; + }; + }; + + gic:interrupt-controller@10481000 { + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-controller; + reg = <0x10481000 0x1000>, + <0x10482000 0x1000>, + <0x10484000 0x2000>, + <0x10486000 0x2000>; + interrupts = <1 9 0xf04>; + }; + + mct@100B0000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x100B0000 0xb00>; + interrupt-controller; + #interrups-cells = <2>; + interrupt-parent = <&mct_map>; + interrupts = <0 0>, <1 0>, <2 0>, <3 0>, + <4 0>, <5 0>, <6 0>, <7 0>, + <8 0>, <9 0>, <10 0>, <11 0>; + clocks = <&cmu_top FIN_PLL>, <&cmu_peri PERI_PCLK_MCT>; + clock-names = "fin_pll", "mct"; + + mct_map: mct-map { + #interrupt-cells = <2>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = <0x0 0 &gic 0 104 0>, + <0x1 0 &gic 0 105 0>, + <0x2 0 &gic 0 106 0>, + <0x3 0 &gic 0 107 0>, + <0x4 0 &gic 0 122 0>, + <0x5 0 &gic 0 123 0>, + <0x6 0 &gic 0 124 0>, + <0x7 0 &gic 0 125 0>, + <0x8 0 &gic 0 126 0>, + <0x9 0 &gic 0 127 0>, + <0xa 0 &gic 0 128 0>, + <0xb 0 &gic 0 129 0>; + }; + }; + + cci@10F00000 { + compatible = "arm,cci-400"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x10F00000 0x1000>; + ranges = <0x0 0x10F00000 0x6000>; + + cci_control0: slave-if@4000 { /* Please check again */ + compatible = "arm,cci-400-ctrl-if"; + interface-type = "ace"; + reg = <0x4000 0x1000>; /* Please check again */ + }; + + cci_control1: slave-if@5000 { /* Please check again */ + compatible = "arm,cci-400-ctrl-if"; + interface-type = "ace"; + reg = <0x5000 0x1000>; /* Please check again */ + }; + }; + + pinctrl_0: pinctrl@11600000 { + compatible = "samsung,exynos5260-pinctrl"; + reg = <0x11600000 0x1000>; + interrupts = <0 79 0>; /* GPIO_RT */ + + wakeup-interrupt-controller { + compatible = "samsung,exynos4210-wakeup-eint"; + interrupt-parent = <&gic>; + interrupts = <0 32 0>; + }; + }; + + pinctrl_1: pinctrl@12290000 { + compatible = "samsung,exynos5260-pinctrl"; + reg = <0x12290000 0x1000>; /* GPIO_FSYS */ + interrupts = <0 157 0>; + }; + + pinctrl_2: pinctrl@128B0000 { + compatible = "samsung,exynos5260-pinctrl"; + reg = <0x128B0000 0x1000>; + interrupts = <0 243 0>; /* GPIO_AUD */ + }; + + serial@12C00000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x12C00000 0x100>; + interrupts = <0 146 0>; + clocks = <&cmu_peri PERI_PCLK_UART0>, <&cmu_peri PERI_SCLK_UART0>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + serial@12C10000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x12C10000 0x100>; + interrupts = <0 147 0>; + clocks = <&cmu_peri PERI_PCLK_UART1>, <&cmu_peri PERI_SCLK_UART1>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + serial@12C20000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x12C20000 0x100>; + interrupts = <0 148 0>; + clocks = <&cmu_peri PERI_PCLK_UART2>, <&cmu_peri PERI_SCLK_UART2>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + serial@12860000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x12860000 0x100>; + interrupts = <0 145 0>; + clocks = <&cmu_aud AUD_PCLK_AUD_UART>, <&cmu_aud AUD_SCLK_AUD_UART>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + dwmmc_0: dwmmc0@12140000 { + compatible = "samsung,exynos5250-dw-mshc"; + reg = <0x12140000 0x2000>; + interrupts = <0 156 0>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cmu_fsys FSYS_HCLK_MMC0>, <&cmu_top TOP_SCLK_MMC0>; + clock-names = "biu", "ciu"; + status = "disabled"; + }; + + dwmmc_1: dwmmc1@12150000 { + compatible = "samsung,exynos5250-dw-mshc"; + reg = <0x12150000 0x2000>; + interrupts = <0 158 0>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cmu_fsys FSYS_HCLK_MMC1>, <&cmu_top TOP_SCLK_MMC1>; + clock-names = "biu", "ciu"; + status = "disabled"; + }; + + dwmmc_2: dwmmc2@12160000 { + compatible = "samsung,exynos5250-dw-mshc"; + reg = <0x12160000 0x2000>; + interrupts = <0 159 0>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cmu_fsys FSYS_HCLK_MMC2>, <&cmu_top TOP_SCLK_MMC2>; + clock-names = "biu", "ciu"; + status = "disabled"; + }; +};