From patchwork Wed Dec 11 22:28:39 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 3328771 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 820AEC0D4A for ; Wed, 11 Dec 2013 22:29:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B6239207E0 for ; Wed, 11 Dec 2013 22:29:55 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A0FEC20803 for ; Wed, 11 Dec 2013 22:29:54 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VqsHa-0003vk-LI; Wed, 11 Dec 2013 22:29:30 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VqsHV-0002jF-DT; Wed, 11 Dec 2013 22:29:25 +0000 Received: from top.free-electrons.com ([176.31.233.9] helo=mail.free-electrons.com) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VqsHI-0002ge-Pc for linux-arm-kernel@lists.infradead.org; Wed, 11 Dec 2013 22:29:13 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id 9D6B27F2; Wed, 11 Dec 2013 23:28:44 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost.localdomain (unknown [190.2.98.212]) by mail.free-electrons.com (Postfix) with ESMTPA id D30C779A; Wed, 11 Dec 2013 23:28:41 +0100 (CET) From: Ezequiel Garcia To: Subject: [PATCH] ARM: mvebu: Enable NAND controller in A370 Reference Design board Date: Wed, 11 Dec 2013 19:28:39 -0300 Message-Id: <1386800920-7096-1-git-send-email-ezequiel.garcia@free-electrons.com> X-Mailer: git-send-email 1.8.1.5 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131211_172912_938792_12DD8C3C X-CRM114-Status: UNSURE ( 7.04 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.4 (-) Cc: Thomas Petazzoni , Andrew Lunn , Jason Cooper , Tawfik Bayouk , Seif Mazareeb , Ezequiel Garcia , Gregory Clement X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Marvell's Armada 370 Reference Design has a NAND flash, so enable it in the devicetree and add the partitions as prepared in the factory images. In order to skip the driver's custom device detection and use only ONFI detection, the "marvell,keep-config" parameter is used. This is needed because we have no support for setting the timings parameters yet. Signed-off-by: Ezequiel Garcia --- arch/arm/boot/dts/armada-370-rd.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts index f81810a..abbb807 100644 --- a/arch/arm/boot/dts/armada-370-rd.dts +++ b/arch/arm/boot/dts/armada-370-rd.dts @@ -104,6 +104,27 @@ gpios = <&gpio0 6 1>; }; }; + + nand@d0000 { + status = "okay"; + num-cs = <1>; + marvell,nand-keep-config; + marvell,nand-enable-arbiter; + nand-on-flash-bbt; + + partition@0 { + label = "U-Boot"; + reg = <0 0x800000>; + }; + partition@800000 { + label = "Linux"; + reg = <0x800000 0x800000>; + }; + partition@1000000 { + label = "Filesystem"; + reg = <0x1000000 0x3f000000>; + }; + }; }; }; };