| Message ID | 1387242783-1462-3-git-send-email-troy.kisky@boundarydevices.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi index 5394e02..8bb910b 100644 --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi @@ -114,7 +114,6 @@ imx6q-sabrelite { pinctrl_hog: hoggrp { fsl,pins = < - MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 @@ -157,7 +156,10 @@ }; pinctrl_usdhc4: usdhc4grp { - fsl,pins = <MX6QDL_USDHC4_PINGRP_D4>; + fsl,pins = < + MX6QDL_USDHC4_PINGRP_D4 + MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */ + >; }; }; };
This patch moves pin NANDF_D6 (CD) from pinctrl_hog to pinctrl_usdhc4. It also explicitly sets the pad to 0x1b0b0, which is also the value that it has before this patch if using mainline u-boot. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> --- v2: New patch.. V1 patch to add comments was broken up into multiple patches --- arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)