| Message ID | 1387327503-15651-3-git-send-email-emilio@elopez.com.ar (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Quoting Emilio López (2013-12-17 16:44:54) > This commit adds gating support to PLL1 on the clock driver. This makes > the PLL1 implementation fully compatible with PLL4 as well. > > Signed-off-by: Emilio López <emilio@elopez.com.ar> > Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org> > --- > Documentation/devicetree/bindings/clock/sunxi.txt | 2 +- > drivers/clk/sunxi/clk-sunxi.c | 2 ++ > 2 files changed, 3 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt > index 91a748f..b8c6cc4 100644 > --- a/Documentation/devicetree/bindings/clock/sunxi.txt > +++ b/Documentation/devicetree/bindings/clock/sunxi.txt > @@ -7,7 +7,7 @@ This binding uses the common clock binding[1]. > Required properties: > - compatible : shall be one of the following: > "allwinner,sun4i-osc-clk" - for a gatable oscillator > - "allwinner,sun4i-pll1-clk" - for the main PLL clock > + "allwinner,sun4i-pll1-clk" - for the main PLL clock and PLL4 > "allwinner,sun6i-a31-pll1-clk" - for the main PLL clock on A31 > "allwinner,sun4i-cpu-clk" - for the CPU multiplexer clock > "allwinner,sun4i-axi-clk" - for the AXI clock > diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c > index 6f756f4..5b86234 100644 > --- a/drivers/clk/sunxi/clk-sunxi.c > +++ b/drivers/clk/sunxi/clk-sunxi.c > @@ -292,11 +292,13 @@ static struct clk_factors_config sun4i_apb1_config = { > }; > > static const struct factors_data sun4i_pll1_data __initconst = { > + .enable = 31, > .table = &sun4i_pll1_config, > .getter = sun4i_get_pll1_factors, > }; > > static const struct factors_data sun6i_a31_pll1_data __initconst = { > + .enable = 31, > .table = &sun6i_a31_pll1_config, > .getter = sun6i_a31_get_pll1_factors, > }; > -- > 1.8.5.1 >
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt index 91a748f..b8c6cc4 100644 --- a/Documentation/devicetree/bindings/clock/sunxi.txt +++ b/Documentation/devicetree/bindings/clock/sunxi.txt @@ -7,7 +7,7 @@ This binding uses the common clock binding[1]. Required properties: - compatible : shall be one of the following: "allwinner,sun4i-osc-clk" - for a gatable oscillator - "allwinner,sun4i-pll1-clk" - for the main PLL clock + "allwinner,sun4i-pll1-clk" - for the main PLL clock and PLL4 "allwinner,sun6i-a31-pll1-clk" - for the main PLL clock on A31 "allwinner,sun4i-cpu-clk" - for the CPU multiplexer clock "allwinner,sun4i-axi-clk" - for the AXI clock diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c index 6f756f4..5b86234 100644 --- a/drivers/clk/sunxi/clk-sunxi.c +++ b/drivers/clk/sunxi/clk-sunxi.c @@ -292,11 +292,13 @@ static struct clk_factors_config sun4i_apb1_config = { }; static const struct factors_data sun4i_pll1_data __initconst = { + .enable = 31, .table = &sun4i_pll1_config, .getter = sun4i_get_pll1_factors, }; static const struct factors_data sun6i_a31_pll1_data __initconst = { + .enable = 31, .table = &sun6i_a31_pll1_config, .getter = sun6i_a31_get_pll1_factors, };