From patchwork Wed Dec 18 22:41:32 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Troy Kisky X-Patchwork-Id: 3374201 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B87339F314 for ; Wed, 18 Dec 2013 22:43:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 80613205DE for ; Wed, 18 Dec 2013 22:43:41 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 48B44205E5 for ; Wed, 18 Dec 2013 22:43:36 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VtPoi-00065b-MQ; Wed, 18 Dec 2013 22:42:13 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VtPoK-0006ai-Ue; Wed, 18 Dec 2013 22:41:48 +0000 Received: from mail-pd0-f177.google.com ([209.85.192.177]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VtPnf-0006XU-Oj for linux-arm-kernel@lists.infradead.org; Wed, 18 Dec 2013 22:41:15 +0000 Received: by mail-pd0-f177.google.com with SMTP id q10so273200pdj.8 for ; Wed, 18 Dec 2013 14:40:44 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UDhXhiQDFNXCyO7htnPg3PfrfrBFK74LuPW7rYiljRg=; b=DEI2UFnUmbOMep8Oe2HctQ2x5zYTND1nXTZc2/QEPdaPHEpTfFap/YMLKODJCfcwGG zk+mOtyeXMPobeS739gUn7qtEQTEVtrZCudNQvzy2htz7kLf/dCUrSuwCiVNnPldfrW4 gxriQWNn9cV26yb6S/gOLEmPyd+JIIs+8a2Lu49q3vRh4MhUALqbszkT7t0fhVXl81jU mh5ojdFV8bGbDcQaK32CWaw51tJiAaoXJABmbQWA8hB9yP9FkQkmibLL31Ndn7zO+3km ePZuVp9k+KyaT4eY/RIREOrwbgPiSf1WhFTSnHXD70HUSGFwjytd7QKsshi6PSi3s4tE h2mg== X-Gm-Message-State: ALoCoQlflLFQb8dIHVI3xEYQPINHpRPqufhG4erLL058zXzoBnjZ+7/zCqTnUqCZvf4tv3RI7Oc5 X-Received: by 10.68.134.229 with SMTP id pn5mr37373945pbb.9.1387406441859; Wed, 18 Dec 2013 14:40:41 -0800 (PST) Received: from officeserver-2 ([63.226.49.26]) by mx.google.com with ESMTPSA id ug2sm3228938pac.21.2013.12.18.14.40.40 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 18 Dec 2013 14:40:41 -0800 (PST) Received: from tkisky by officeserver-2 with local (Exim 4.80) (envelope-from ) id 1VtPoA-0006t6-Te; Wed, 18 Dec 2013 15:41:38 -0700 From: Troy Kisky To: shawn.guo@linaro.org Subject: [PATCH V1 2/7] ARM: dts: imx6qdl: add pingroups for enet with GPIO6 interrupt Date: Wed, 18 Dec 2013 15:41:32 -0700 Message-Id: <1387406497-26430-3-git-send-email-troy.kisky@boundarydevices.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1387406497-26430-1-git-send-email-troy.kisky@boundarydevices.com> References: <1387406497-26430-1-git-send-email-troy.kisky@boundarydevices.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131218_174108_046496_8807DAD6 X-CRM114-Status: UNSURE ( 8.16 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) Cc: marex@denx.de, eric.nelson@boundarydevices.com, Troy Kisky , ra5478@freescale.com, festevam@gmail.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY, UPPERCASE_50_75 autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Most boards will want this hardware work-around so add new pingroups. Also, add MX6QDL_ENET_PINGRP_RGMII macro so that other pingroups can use this. Signed-off-by: Troy Kisky --- arch/arm/boot/dts/imx6qdl-pingrp.h | 77 ++++++++++++++++---------------------- 1 file changed, 33 insertions(+), 44 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl-pingrp.h b/arch/arm/boot/dts/imx6qdl-pingrp.h index c9dd44c..082f0df 100644 --- a/arch/arm/boot/dts/imx6qdl-pingrp.h +++ b/arch/arm/boot/dts/imx6qdl-pingrp.h @@ -53,57 +53,37 @@ MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 \ MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 +#define MX6QDL_ENET_PINGRP_RGMII(rx_pad, tx_pad) \ + MX6QDL_PAD_RGMII_RXC__RGMII_RXC rx_pad \ + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 rx_pad \ + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 rx_pad \ + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 rx_pad \ + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 rx_pad \ + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL rx_pad \ + MX6QDL_PAD_RGMII_TXC__RGMII_TXC tx_pad \ + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 tx_pad \ + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 tx_pad \ + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 tx_pad \ + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 tx_pad \ + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL tx_pad \ + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK tx_pad + +#define MX6QDL_ENET_PINGRP_RGMII_MD(rx_pad, tx_pad) \ + MX6QDL_ENET_PINGRP_RGMII(rx_pad, tx_pad) \ + MX6QDL_PAD_ENET_MDIO__ENET_MDIO tx_pad \ + MX6QDL_PAD_ENET_MDC__ENET_MDC tx_pad + #define MX6QDL_ENET_PINGRP1 \ - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 \ - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 \ - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 \ - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 \ - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 \ - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 \ - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 \ + MX6QDL_ENET_PINGRP_RGMII_MD(0x1b0b0, 0x1b0b0) \ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 #define MX6QDL_ENET_PINGRP2 \ + MX6QDL_ENET_PINGRP_RGMII(0x1b0b0, 0x1b0b0) \ MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 \ - MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 \ - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 \ - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 \ - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 \ - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 \ - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 + MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 #define MX6QDL_ENET_PINGRP3 \ - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 \ - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 \ - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 \ - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 \ - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 \ - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 \ - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 \ + MX6QDL_ENET_PINGRP_RGMII_MD(0x1b0b0, 0x1b0b0) \ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 #define MX6QDL_ENET_PINGRP4 \ @@ -117,6 +97,15 @@ MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 \ MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 +#define MX6QDL_ENET_PINGRP1_GPIO6 MX6QDL_ENET_PINGRP1 \ + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 + +#define MX6QDL_ENET_PINGRP2_GPIO6 MX6QDL_ENET_PINGRP2 \ + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 + +#define MX6QDL_ENET_PINGRP3_GPIO6 MX6QDL_ENET_PINGRP3 \ + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 + #define MX6QDL_ESAI_PINGRP1 \ MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1b030 \ MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1b030 \