| Message ID | 1387525930-27313-5-git-send-email-peter.chen@freescale.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
diff --git a/Documentation/devicetree/bindings/usb/mxs-phy.txt b/Documentation/devicetree/bindings/usb/mxs-phy.txt index b43d4c9e..fc6659d 100644 --- a/Documentation/devicetree/bindings/usb/mxs-phy.txt +++ b/Documentation/devicetree/bindings/usb/mxs-phy.txt @@ -5,10 +5,12 @@ Required properties: for imx6dq and imx6dl, "fsl,imx6sl-usbphy" for imx6sl - reg: Should contain registers location and length - interrupts: Should contain phy interrupt +- fsl,anatop: phandle for anatop register, it is only for imx6 SoC series Example: usbphy1: usbphy@020c9000 { compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; reg = <0x020c9000 0x1000>; interrupts = <0 44 0x04>; + fsl,anatop = <&anatop>; };
Add anatop phandle which is used to access anatop registers to control PHY's power and other USB operations. Signed-off-by: Peter Chen <peter.chen@freescale.com> --- Documentation/devicetree/bindings/usb/mxs-phy.txt | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)