From patchwork Fri Dec 20 18:47:08 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Troy Kisky X-Patchwork-Id: 3391571 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 11E0EC0D4A for ; Fri, 20 Dec 2013 20:03:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D656B206FE for ; Fri, 20 Dec 2013 20:03:08 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5CEA0206FC for ; Fri, 20 Dec 2013 20:03:07 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vu57j-0007X1-Tg; Fri, 20 Dec 2013 18:48:37 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vu570-0004dc-GS; Fri, 20 Dec 2013 18:47:50 +0000 Received: from mail-pb0-f44.google.com ([209.85.160.44]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vu55z-0004XI-LO for linux-arm-kernel@lists.infradead.org; Fri, 20 Dec 2013 18:46:51 +0000 Received: by mail-pb0-f44.google.com with SMTP id rq2so2981941pbb.3 for ; Fri, 20 Dec 2013 10:46:21 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UDhXhiQDFNXCyO7htnPg3PfrfrBFK74LuPW7rYiljRg=; b=HkwOVhq3ErCWd54IhYVXgub4ziwBwD3RpXhqbTmspYsaT5fJ6m2M9lYgGsc74fOVHR oRsnvEZUK48xyqK28yN7eTb+LlE8hSbJeBCVsQo52w3yLvRvtuVHk+FE7TJSSon9VLdh MHlcGGUGL5nxdxYDo3ydBAga3wkuI1SBAHJsT1gxD2ub9TVJPsIl91Ne23B//vp/Jdiw yOsZYhzP3OQW3KkpGH49IMOYZP4HyyqeDq5MMcfzGzDbAOBO/kG7zAk1jDpaxM1Xm2Tk sm0K03Q+sEwXEazL/UtVgUMG9N3h8wucAYdg9yk8MkiTCLui8y2QB5bYwFIVoTo5gYpX 4pzw== X-Gm-Message-State: ALoCoQkheL9oB4pHIs5ez5PwYMzvHePC7mdsLqg8YFQ8B1O1tV+udFLp/xDs0n1D7XLT/XRfHYzU X-Received: by 10.68.190.33 with SMTP id gn1mr10517294pbc.48.1387565178026; Fri, 20 Dec 2013 10:46:18 -0800 (PST) Received: from officeserver-2 ([63.226.49.26]) by mx.google.com with ESMTPSA id oj6sm20835564pab.9.2013.12.20.10.46.15 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 20 Dec 2013 10:46:16 -0800 (PST) Received: from tkisky by officeserver-2 with local (Exim 4.80) (envelope-from ) id 1Vu56R-0004DC-47; Fri, 20 Dec 2013 11:47:15 -0700 From: Troy Kisky To: shawn.guo@linaro.org Subject: [PATCH V2 2/7] ARM: dts: imx6qdl: add pingroups for enet with GPIO6 interrupt Date: Fri, 20 Dec 2013 11:47:08 -0700 Message-Id: <1387565233-16144-3-git-send-email-troy.kisky@boundarydevices.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1387565233-16144-1-git-send-email-troy.kisky@boundarydevices.com> References: <1387565233-16144-1-git-send-email-troy.kisky@boundarydevices.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131220_134647_994489_2723365E X-CRM114-Status: UNSURE ( 7.94 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.6 (--) Cc: marex@denx.de, eric.nelson@boundarydevices.com, Troy Kisky , ra5478@freescale.com, festevam@gmail.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY, UPPERCASE_50_75 autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Most boards will want this hardware work-around so add new pingroups. Also, add MX6QDL_ENET_PINGRP_RGMII macro so that other pingroups can use this. Signed-off-by: Troy Kisky --- arch/arm/boot/dts/imx6qdl-pingrp.h | 77 ++++++++++++++++---------------------- 1 file changed, 33 insertions(+), 44 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl-pingrp.h b/arch/arm/boot/dts/imx6qdl-pingrp.h index c9dd44c..082f0df 100644 --- a/arch/arm/boot/dts/imx6qdl-pingrp.h +++ b/arch/arm/boot/dts/imx6qdl-pingrp.h @@ -53,57 +53,37 @@ MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 \ MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 +#define MX6QDL_ENET_PINGRP_RGMII(rx_pad, tx_pad) \ + MX6QDL_PAD_RGMII_RXC__RGMII_RXC rx_pad \ + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 rx_pad \ + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 rx_pad \ + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 rx_pad \ + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 rx_pad \ + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL rx_pad \ + MX6QDL_PAD_RGMII_TXC__RGMII_TXC tx_pad \ + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 tx_pad \ + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 tx_pad \ + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 tx_pad \ + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 tx_pad \ + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL tx_pad \ + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK tx_pad + +#define MX6QDL_ENET_PINGRP_RGMII_MD(rx_pad, tx_pad) \ + MX6QDL_ENET_PINGRP_RGMII(rx_pad, tx_pad) \ + MX6QDL_PAD_ENET_MDIO__ENET_MDIO tx_pad \ + MX6QDL_PAD_ENET_MDC__ENET_MDC tx_pad + #define MX6QDL_ENET_PINGRP1 \ - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 \ - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 \ - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 \ - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 \ - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 \ - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 \ - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 \ + MX6QDL_ENET_PINGRP_RGMII_MD(0x1b0b0, 0x1b0b0) \ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 #define MX6QDL_ENET_PINGRP2 \ + MX6QDL_ENET_PINGRP_RGMII(0x1b0b0, 0x1b0b0) \ MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 \ - MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 \ - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 \ - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 \ - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 \ - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 \ - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 + MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 #define MX6QDL_ENET_PINGRP3 \ - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 \ - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 \ - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 \ - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 \ - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 \ - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 \ - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 \ - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 \ - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 \ + MX6QDL_ENET_PINGRP_RGMII_MD(0x1b0b0, 0x1b0b0) \ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 #define MX6QDL_ENET_PINGRP4 \ @@ -117,6 +97,15 @@ MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 \ MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 +#define MX6QDL_ENET_PINGRP1_GPIO6 MX6QDL_ENET_PINGRP1 \ + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 + +#define MX6QDL_ENET_PINGRP2_GPIO6 MX6QDL_ENET_PINGRP2 \ + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 + +#define MX6QDL_ENET_PINGRP3_GPIO6 MX6QDL_ENET_PINGRP3 \ + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 + #define MX6QDL_ESAI_PINGRP1 \ MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1b030 \ MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1b030 \