From patchwork Tue Dec 24 14:14:34 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 3403481 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9C7B89F169 for ; Tue, 24 Dec 2013 14:21:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0887A20429 for ; Tue, 24 Dec 2013 14:21:53 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4E940203AF for ; Tue, 24 Dec 2013 14:21:51 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VvSqN-00058J-P8; Tue, 24 Dec 2013 14:20:25 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VvSq1-0005fu-1L; Tue, 24 Dec 2013 14:20:01 +0000 Received: from mailout1.w1.samsung.com ([210.118.77.11]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VvSlt-00058e-I2 for linux-arm-kernel@lists.infradead.org; Tue, 24 Dec 2013 14:15:50 +0000 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout1.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MYB00EBKE9ADW60@mailout1.w1.samsung.com> for linux-arm-kernel@lists.infradead.org; Tue, 24 Dec 2013 14:15:10 +0000 (GMT) X-AuditID: cbfec7f4-b7f796d000005a13-cf-52b996eec61b Received: from eusync2.samsung.com ( [203.254.199.212]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id 98.19.23059.EE699B25; Tue, 24 Dec 2013 14:15:10 +0000 (GMT) Received: from amdc1227.digital.local ([106.116.147.199]) by eusync2.samsung.com (Oracle Communications Messaging Server 7u4-23.01(7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0MYB00MNYE90WR00@eusync2.samsung.com>; Tue, 24 Dec 2013 14:15:09 +0000 (GMT) From: Tomasz Figa To: linux-samsung-soc@vger.kernel.org Subject: [PATCH RFC 11/11] ARM: EXYNOS: Stop using legacy Samsung PM code Date: Tue, 24 Dec 2013 15:14:34 +0100 Message-id: <1387894474-14428-11-git-send-email-t.figa@samsung.com> X-Mailer: git-send-email 1.8.4.3 In-reply-to: <1387894474-14428-1-git-send-email-t.figa@samsung.com> References: <1387894474-14428-1-git-send-email-t.figa@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrIJMWRmVeSWpSXmKPExsVy+t/xK7rvpu0MMpj4jdHi76Rj7Ba9C66y WWx6fI3VYsb5fUwWp65/ZrNYP+M1iwObx+9fkxg9Ni+p97hyoonVo2/LKkaPz5vkAlijuGxS UnMyy1KL9O0SuDLevznMXtASVDHt+mTmBsYLzl2MnBwSAiYSve8PM0HYYhIX7q1n62Lk4hAS WMooceDFKiYIp49J4u7hXlaQKjYBNYnPDY/YQGwRAVWJz20L2EGKmAU2MUp83n0YrEhYwFNi 7tt+sCIWoKJ13ZvBVvAKOEscv3KIHWKdgkTnmv+MIDYnUPzqp8tgcSEBJ4nPl14zT2DkXcDI sIpRNLU0uaA4KT3XUK84Mbe4NC9dLzk/dxMjJJi+7GBcfMzqEKMAB6MSD29B6Y4gIdbEsuLK 3EOMEhzMSiK8VxR3BgnxpiRWVqUW5ccXleakFh9iZOLglGpg9EnKcboX1/7cYJ3wcY0b/Xyf dNfIvlz9QWL6hW/LGkyVi7bv46tonqCjerdJUfS76G+nVt3rsotSn0755cJt0tggMfulSOPO 2YlBQtsKJieeav6nXR8jvzG+fZGgmYTsTM3NU1cyJuoI2dm1vnrNEWvVKb9zwbr9jDNvsryZ 8Dy/LZ9XqLVKiaU4I9FQi7moOBEA0E6U+AQCAAA= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131224_091545_773193_928DEA3D X-CRM114-Status: GOOD ( 26.65 ) X-Spam-Score: -7.5 (-------) Cc: Olof Johansson , Tomasz Figa , Kukjin Kim , Arnd Bergmann , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since Exynos SoCs does not follow most of the semantics of older SoCs when configuring the system to enter sleep, there is no reason to rely on the legacy Samsung PM core anymore. This patch adds local Exynos suspend ops and removes all the code left unnecessary. As a side effect, suspend support on Exynos becomes multiplatform-friendly. Signed-off-by: Tomasz Figa --- arch/arm/mach-exynos/Kconfig | 8 --- arch/arm/mach-exynos/Makefile | 2 +- arch/arm/mach-exynos/common.h | 8 +++ arch/arm/mach-exynos/include/mach/pm-core.h | 72 -------------------------- arch/arm/mach-exynos/pm.c | 79 ++++++++++++++++++++++++++--- arch/arm/plat-samsung/s5p-sleep.S | 43 ---------------- 6 files changed, 80 insertions(+), 132 deletions(-) delete mode 100644 arch/arm/mach-exynos/include/mach/pm-core.h diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 27ea463..9e06e60 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -49,8 +49,6 @@ config CPU_EXYNOS4210 select ARM_CPU_SUSPEND if PM_SLEEP select PINCTRL_EXYNOS select PM_GENERIC_DOMAINS if PM_RUNTIME - select S5P_PM if PM_SLEEP - select S5P_SLEEP if PM_SLEEP select SAMSUNG_DMADEV help Enable EXYNOS4210 CPU support @@ -62,8 +60,6 @@ config SOC_EXYNOS4212 select ARCH_HAS_BANDGAP select PINCTRL_EXYNOS select PM_GENERIC_DOMAINS if PM_RUNTIME - select S5P_PM if PM_SLEEP - select S5P_SLEEP if PM_SLEEP select SAMSUNG_DMADEV help Enable EXYNOS4212 SoC support @@ -86,8 +82,6 @@ config SOC_EXYNOS5250 select ARCH_HAS_BANDGAP select PINCTRL_EXYNOS select PM_GENERIC_DOMAINS if PM_RUNTIME - select S5P_PM if PM_SLEEP - select S5P_SLEEP if PM_SLEEP select S5P_DEV_MFC select SAMSUNG_DMADEV help @@ -98,8 +92,6 @@ config SOC_EXYNOS5420 default y depends on ARCH_EXYNOS5 select PM_GENERIC_DOMAINS if PM_RUNTIME - select S5P_PM if PM_SLEEP - select S5P_SLEEP if PM_SLEEP help Enable EXYNOS5420 SoC support diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index 8930b66..58fe9e6 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -14,7 +14,7 @@ obj- := obj-$(CONFIG_ARCH_EXYNOS) += common.o -obj-$(CONFIG_S5P_PM) += pm.o +obj-$(CONFIG_PM_SLEEP) += pm.o sleep.o obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h index f2d1892..e8342e5 100644 --- a/arch/arm/mach-exynos/common.h +++ b/arch/arm/mach-exynos/common.h @@ -32,12 +32,20 @@ int exynos_pm_late_initcall(void); static inline int exynos_pm_late_initcall(void) { return 0; } #endif +#ifdef CONFIG_PINCTRL_EXYNOS +extern u32 exynos_get_eint_wake_mask(void); +#else +static inline u32 exynos_get_eint_wake_mask(void) { return 0xffffffff; } +#endif + #ifdef CONFIG_PM_SLEEP extern void __init exynos_pm_init(void); #else static inline void exynos_pm_init(void) {} #endif +extern void exynos_cpu_resume(void); + extern struct smp_operations exynos_smp_ops; extern void exynos_cpu_die(unsigned int cpu); diff --git a/arch/arm/mach-exynos/include/mach/pm-core.h b/arch/arm/mach-exynos/include/mach/pm-core.h deleted file mode 100644 index 2b00833..0000000 --- a/arch/arm/mach-exynos/include/mach/pm-core.h +++ /dev/null @@ -1,72 +0,0 @@ -/* linux/arch/arm/mach-exynos4/include/mach/pm-core.h - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Based on arch/arm/mach-s3c2410/include/mach/pm-core.h, - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * EXYNOS4210 - PM core support for arch/arm/plat-s5p/pm.c - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_PM_CORE_H -#define __ASM_ARCH_PM_CORE_H __FILE__ - -#include -#include - -#ifdef CONFIG_PINCTRL_EXYNOS -extern u32 exynos_get_eint_wake_mask(void); -#else -static inline u32 exynos_get_eint_wake_mask(void) { return 0xffffffff; } -#endif - -static inline void s3c_pm_debug_init_uart(void) -{ - /* nothing here yet */ -} - -static inline void s3c_pm_arch_prepare_irqs(void) -{ - __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK); - __raw_writel(s3c_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK); -} - -static inline void s3c_pm_arch_stop_clocks(void) -{ - /* nothing here yet */ -} - -static inline void s3c_pm_arch_show_resume_irqs(void) -{ - /* nothing here yet */ -} - -static inline void s3c_pm_arch_update_uart(void __iomem *regs, - struct pm_uart_save *save) -{ - /* nothing here yet */ -} - -static inline void s3c_pm_restored_gpios(void) -{ - /* nothing here yet */ -} - -static inline void samsung_pm_saved_gpios(void) -{ - /* nothing here yet */ -} - -/* Compatibility definitions to make plat-samsung/pm.c compile */ -#define IRQ_EINT_BIT(x) 1 -#define s3c_irqwake_intallow 0 -#define s3c_irqwake_eintallow 0 - -#endif /* __ASM_ARCH_PM_CORE_H */ diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 8cdb000..29b6a22 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -23,15 +23,15 @@ #include #include #include +#include #include -#include +#include #include #include #include #include -#include #include "common.h" @@ -48,6 +48,7 @@ static struct sleep_save exynos_core_save[] = { SAVE_ITEM(S5P_SROM_BC3), }; +static u32 exynos_irqwake_intmask = 0xffffffff; /* For Cortex-A9 Diagnostic and Power control register */ static unsigned int save_arm_register[2]; @@ -72,6 +73,10 @@ static void exynos_pm_prepare(void) { unsigned int tmp; + /* Set wake-up mask registers */ + __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK); + __raw_writel(exynos_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK); + s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save)); if (soc_is_exynos5250()) { @@ -89,7 +94,7 @@ static void exynos_pm_prepare(void) /* ensure at least INFORM0 has the resume address */ - __raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0); + __raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0); } static int exynos_pm_suspend(void) @@ -187,14 +192,71 @@ static struct syscore_ops exynos_pm_syscore_ops = { .resume = exynos_pm_resume, }; -void __init exynos_pm_init(void) +/* + * Suspend Ops + */ + +static int exynos_suspend_enter(suspend_state_t state) { - u32 tmp; + int ret; + + s3c_pm_debug_init(); + + S3C_PMDBG("%s: suspending the system...\n", __func__); + + S3C_PMDBG("%s: wakeup masks: %08x,%08x\n", __func__, + exynos_irqwake_intmask, exynos_get_eint_wake_mask()); - pm_cpu_prep = exynos_pm_prepare; - pm_cpu_sleep = exynos_cpu_suspend; + if (exynos_irqwake_intmask == -1U + && exynos_get_eint_wake_mask() == -1U) { + printk(KERN_ERR "%s: No wake-up sources!\n", __func__); + printk(KERN_ERR "%s: Aborting sleep\n", __func__); + return -EINVAL; + } + + s3c_pm_save_uarts(); + exynos_pm_prepare(); + flush_cache_all(); + s3c_pm_check_store(); + + ret = cpu_suspend(0, exynos_cpu_suspend); + if (ret) + return ret; + + s3c_pm_restore_uarts(); - s3c_pm_init(); + S3C_PMDBG("%s: wakeup stat: %08x\n", __func__, + __raw_readl(S5P_WAKEUP_STAT)); + + s3c_pm_check_restore(); + + S3C_PMDBG("%s: resuming the system...\n", __func__); + + return 0; +} + +static int exynos_suspend_prepare(void) +{ + s3c_pm_check_prepare(); + + return 0; +} + +static void exynos_suspend_finish(void) +{ + s3c_pm_check_cleanup(); +} + +static const struct platform_suspend_ops exynos_suspend_ops = { + .enter = exynos_suspend_enter, + .prepare = exynos_suspend_prepare, + .finish = exynos_suspend_finish, + .valid = suspend_valid_only_mem, +}; + +void __init exynos_pm_init(void) +{ + u32 tmp; /* All wakeup disable */ tmp = __raw_readl(S5P_WAKEUP_MASK); @@ -202,4 +264,5 @@ void __init exynos_pm_init(void) __raw_writel(tmp, S5P_WAKEUP_MASK); register_syscore_ops(&exynos_pm_syscore_ops); + suspend_set_ops(&exynos_suspend_ops); } diff --git a/arch/arm/plat-samsung/s5p-sleep.S b/arch/arm/plat-samsung/s5p-sleep.S index a030e73..c500165 100644 --- a/arch/arm/plat-samsung/s5p-sleep.S +++ b/arch/arm/plat-samsung/s5p-sleep.S @@ -23,18 +23,7 @@ #include #include -#include -#define CPU_MASK 0xff0ffff0 -#define CPU_CORTEX_A9 0x410fc090 - -/* - * The following code is located into the .data section. This is to - * allow l2x0_regs_phys to be accessed with a relative load while we - * can't rely on any MMU translation. We could have put l2x0_regs_phys - * in the .text section as well, but some setups might insist on it to - * be truly read-only. (Reference from: arch/arm/kernel/sleep.S) - */ .data .align @@ -53,37 +42,5 @@ */ ENTRY(s3c_cpu_resume) -#ifdef CONFIG_CACHE_L2X0 - mrc p15, 0, r0, c0, c0, 0 - ldr r1, =CPU_MASK - and r0, r0, r1 - ldr r1, =CPU_CORTEX_A9 - cmp r0, r1 - bne resume_l2on - adr r0, l2x0_regs_phys - ldr r0, [r0] - ldr r1, [r0, #L2X0_R_PHY_BASE] - ldr r2, [r1, #L2X0_CTRL] - tst r2, #0x1 - bne resume_l2on - ldr r2, [r0, #L2X0_R_AUX_CTRL] - str r2, [r1, #L2X0_AUX_CTRL] - ldr r2, [r0, #L2X0_R_TAG_LATENCY] - str r2, [r1, #L2X0_TAG_LATENCY_CTRL] - ldr r2, [r0, #L2X0_R_DATA_LATENCY] - str r2, [r1, #L2X0_DATA_LATENCY_CTRL] - ldr r2, [r0, #L2X0_R_PREFETCH_CTRL] - str r2, [r1, #L2X0_PREFETCH_CTRL] - ldr r2, [r0, #L2X0_R_PWR_CTRL] - str r2, [r1, #L2X0_POWER_CTRL] - mov r2, #1 - str r2, [r1, #L2X0_CTRL] -resume_l2on: -#endif b cpu_resume ENDPROC(s3c_cpu_resume) -#ifdef CONFIG_CACHE_L2X0 - .globl l2x0_regs_phys -l2x0_regs_phys: - .long 0 -#endif