From patchwork Mon Dec 30 03:25:48 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 3417471 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6E54C9F374 for ; Mon, 30 Dec 2013 03:29:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A0DEA200FE for ; Mon, 30 Dec 2013 03:29:34 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ADBC0200F3 for ; Mon, 30 Dec 2013 03:29:33 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VxTXH-0002Es-MC; Mon, 30 Dec 2013 03:28:59 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VxTXB-000870-2H; Mon, 30 Dec 2013 03:28:53 +0000 Received: from smtp.csie.ntu.edu.tw ([140.112.30.61]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VxTWx-00084x-Uf for linux-arm-kernel@lists.infradead.org; Mon, 30 Dec 2013 03:28:41 +0000 Received: from mirror2.csie.ntu.edu.tw (mirror2.csie.ntu.edu.tw [140.112.30.76]) by smtp.csie.ntu.edu.tw (Postfix) with ESMTPSA id D44A2205D3; Mon, 30 Dec 2013 11:28:06 +0800 (CST) Received: from wens by mirror2.csie.ntu.edu.tw with local (Exim 4.82) (envelope-from ) id 1VxTWQ-0007Qb-Q4; Mon, 30 Dec 2013 11:28:06 +0800 From: Chen-Yu Tsai To: Maxime Ripard Subject: [PATCH v2 3/4] pinctrl: sunxi: Add Allwinner A20 clock output pin functions Date: Mon, 30 Dec 2013 11:25:48 +0800 Message-Id: <1388373949-28506-4-git-send-email-wens@csie.org> X-Mailer: git-send-email 1.8.5.2 In-Reply-To: <1388373949-28506-1-git-send-email-wens@csie.org> References: <1388373949-28506-1-git-send-email-wens@csie.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131229_222840_265872_F426BF79 X-CRM114-Status: UNSURE ( 9.33 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.3 (--) Cc: Mike Turquette , emilio@elopez.com.ar, Linus Walleij , Chen-Yu Tsai , linux-sunxi@googlegroups.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the clock output pin functions on the A20. The 2 pins can output a configurable clock to be used by external modules. This is used on the CubieTruck, to supply a 32768 Hz low power clock to the onboard Wifi+BT module. Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard --- drivers/pinctrl/pinctrl-sunxi-pins.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pinctrl/pinctrl-sunxi-pins.h b/drivers/pinctrl/pinctrl-sunxi-pins.h index 2c7446a..6fd8d4d 100644 --- a/drivers/pinctrl/pinctrl-sunxi-pins.h +++ b/drivers/pinctrl/pinctrl-sunxi-pins.h @@ -3774,12 +3774,14 @@ static const struct sunxi_desc_pin sun7i_a20_pins[] = { SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "spi0"), /* MOSI */ SUNXI_FUNCTION(0x3, "uart6"), /* TX */ + SUNXI_FUNCTION(0x4, "clk_out_a"), /* CLK_OUT_A */ SUNXI_FUNCTION_IRQ(0x5, 24)), /* EINT24 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI13, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "spi0"), /* MISO */ SUNXI_FUNCTION(0x3, "uart6"), /* RX */ + SUNXI_FUNCTION(0x4, "clk_out_b"), /* CLK_OUT_B */ SUNXI_FUNCTION_IRQ(0x5, 25)), /* EINT25 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI14, SUNXI_FUNCTION(0x0, "gpio_in"),