From patchwork Tue Dec 31 16:32:10 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Jacques Hiblot X-Patchwork-Id: 3422101 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 67EA59F295 for ; Tue, 31 Dec 2013 16:37:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 71A5020120 for ; Tue, 31 Dec 2013 16:37:30 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5AF9120121 for ; Tue, 31 Dec 2013 16:37:29 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vy2JF-00083m-H7; Tue, 31 Dec 2013 16:36:49 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vy2J7-0003EH-Qo; Tue, 31 Dec 2013 16:36:41 +0000 Received: from mail-we0-f181.google.com ([74.125.82.181]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vy2Ih-0003AI-EN for linux-arm-kernel@lists.infradead.org; Tue, 31 Dec 2013 16:36:16 +0000 Received: by mail-we0-f181.google.com with SMTP id x55so11051356wes.40 for ; Tue, 31 Dec 2013 08:35:53 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=nf/gAE52HzZpLLYDu0Bu0k9jHI24iXUeuPqmL3cfHKE=; b=hU6gfR3j9H5LhizQeZZCO8pLNci+1TE0vTJEj1CGFZi0//NHQnffpGmlEN5ewZs3QG aDjnJh13XH18jm3pclnLfA47iR510t+D7oA+g711E/97oq4U9PF5x2XSqCmDaVhkAE1D GMLKm3rwFDwi3pZ4MnzWV0GLBfquN+6kpxR38m+GsrolVffEb3jQMxA7EPyznwGtQxy/ k3F75hSSgIzRcz5cJ7zIAXFkRDulyj6+G3Ahm6VVdaIkcEemTev+St1PwPC0N5Y5GW2W iODdWj4fAacdMlO8SsKvH5u4jNkwnm0XhfOxhE3hFasu0L0GZLQbjJzKohVBbc+My0Ix /CHw== X-Received: by 10.180.9.39 with SMTP id w7mr17172355wia.9.1388507753740; Tue, 31 Dec 2013 08:35:53 -0800 (PST) Received: from stedf17-labo202.ds.jdsu.net. (4-161.80-90.static-ip.oleane.fr. [90.80.161.4]) by mx.google.com with ESMTPSA id fj8sm76137500wib.1.2013.12.31.08.35.52 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 31 Dec 2013 08:35:52 -0800 (PST) From: jjhiblot@traphandler.com To: nicolas.ferre@atmel.com Subject: [PATCH 2/6] at91: dt: sam9261: Added support for the lcd display Date: Tue, 31 Dec 2013 17:32:10 +0100 Message-Id: <1388507534-10570-3-git-send-email-jjhiblot@traphandler.com> X-Mailer: git-send-email 1.8.4.2 In-Reply-To: <1388507534-10570-1-git-send-email-jjhiblot@traphandler.com> References: <1388507534-10570-1-git-send-email-jjhiblot@traphandler.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131231_113615_579629_E484AD1F X-CRM114-Status: UNSURE ( 9.73 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.6 (--) Cc: jean-jacques hiblot , Jean-Jacques Hiblot , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: jean-jacques hiblot Signed-off-by: Jean-Jacques Hiblot --- arch/arm/boot/dts/at91sam9261.dtsi | 37 ++++++++++++++++++++++++++++++++++++- arch/arm/boot/dts/at91sam9261ek.dts | 31 +++++++++++++++++++++++++++++++ arch/arm/mach-at91/at91sam9261.c | 1 + 3 files changed, 68 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi index ce23d7d..7ee0fff 100644 --- a/arch/arm/boot/dts/at91sam9261.dtsi +++ b/arch/arm/boot/dts/at91sam9261.dtsi @@ -290,7 +290,33 @@ atmel,pins = ; }; }; - + fb { + pinctrl_fb: fb-0 { + atmel,pins = + ; + }; + }; pioA: gpio@fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x200>; @@ -436,6 +462,15 @@ }; }; + fb0: fb@0x00600000 { + compatible = "atmel,at91sam9261-lcdc"; + reg = <0x00600000 0x1000>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fb>; + status = "disabled"; + }; + nand0: nand@40000000 { compatible = "atmel,at91rm9200-nand"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts index f3d22a9..03c05fc 100644 --- a/arch/arm/boot/dts/at91sam9261ek.dts +++ b/arch/arm/boot/dts/at91sam9261ek.dts @@ -52,6 +52,37 @@ reg = <0x0 0x20000>; }; }; + + fb0: fb@0x00600000 { + display = <&display0>; + status = "okay"; + atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>; + display0: display { + bits-per-pixel = <16>; + atmel,lcdcon-backlight; + atmel,dmacon = <0x1>; + atmel,lcdcon2 = <0x80008002>; + atmel,guard-time = <1>; + atmel,lcd-wiring-mode = "BRG"; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <4965000>; + hactive = <240>; + vactive = <320>; + hback-porch = <1>; + hfront-porch = <33>; + vback-porch = <1>; + vfront-porch = <0>; + hsync-len = <5>; + vsync-len = <1>; + hsync-active = <1>; + vsync-active = <1>; + }; + }; + }; + }; }; leds { diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 200d17a..a67bfe6 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -197,6 +197,7 @@ static struct clk_lookup periph_clocks_lookups[] = { /* more tc lookup table for DT entries */ CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk), CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk), + CLKDEV_CON_DEV_ID("hclk", "600000.fb", &hck1), CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk), CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk), CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),