From patchwork Tue Jan 7 14:47:40 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrzej Hajda X-Patchwork-Id: 3448961 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id ACB019F2E9 for ; Tue, 7 Jan 2014 15:32:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6975320109 for ; Tue, 7 Jan 2014 15:32:51 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F0CBE200F4 for ; Tue, 7 Jan 2014 15:32:49 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W0Y0M-00027v-4u; Tue, 07 Jan 2014 14:51:43 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1W0XzT-0001QB-E4; Tue, 07 Jan 2014 14:50:47 +0000 Received: from mailout2.w1.samsung.com ([210.118.77.12]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W0XyI-0001Ck-Ri for linux-arm-kernel@lists.infradead.org; Tue, 07 Jan 2014 14:49:36 +0000 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout2.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MZ100AWDD4L7A80@mailout2.w1.samsung.com> for linux-arm-kernel@lists.infradead.org; Tue, 07 Jan 2014 14:48:21 +0000 (GMT) X-AuditID: cbfec7f5-b7fc96d000004885-84-52cc13b7a788 Received: from eusync2.samsung.com ( [203.254.199.212]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id E7.97.18565.7B31CC25; Tue, 07 Jan 2014 14:48:23 +0000 (GMT) Received: from AMDC1061.digital.local ([106.116.147.88]) by eusync2.samsung.com (Oracle Communications Messaging Server 7u4-23.01 (7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0MZ1002YFD4CZ570@eusync2.samsung.com>; Tue, 07 Jan 2014 14:48:23 +0000 (GMT) From: Andrzej Hajda To: linux-arm-kernel@lists.infradead.org Subject: [PATCH RESEND v2 12/12] clk: exynos5440: replace clock ID private enums with IDs from DT header Date: Tue, 07 Jan 2014 15:47:40 +0100 Message-id: <1389106060-20291-13-git-send-email-a.hajda@samsung.com> X-Mailer: git-send-email 1.8.3.2 In-reply-to: <1389106060-20291-1-git-send-email-a.hajda@samsung.com> References: <1389106060-20291-1-git-send-email-a.hajda@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrKJMWRmVeSWpSXmKPExsVy+t/xK7rbhc8EGWw+z2lxa905Vov5R4BE 74KrbBZnm96wW2x6fI3VYsb5fUwWTydcZLNYP+M1iwOHx51re9g8Ni+p9+jbsorR4/MmuQCW KC6blNSczLLUIn27BK6Mm81t7AVzDSuefZzA2sB4VrOLkZNDQsBEYsqHRawQtpjEhXvr2boY uTiEBJYySuzbeoMFwuljkph3ZjMjSBWbgKbE38032UBsEQENiSldj9lBipgFLjNJLHn2Aywh LJAlsWn+IWYQm0VAVeLS/89MIDavgIvE9rtr2CHWKUgs+7IWrIYTKP7n2HWgbRxA25wlZqww nsDIu4CRYRWjaGppckFxUnqukV5xYm5xaV66XnJ+7iZGSFB93cG49JjVIUYBDkYlHt4Ju08F CbEmlhVX5h5ilOBgVhLhZb5xOkiINyWxsiq1KD++qDQntfgQIxMHp1QDo43Uyf8NFy/NOnW9 92hDT6PKEvuLfoXrlF7UBFzR0GH7a7BigUJUsM/C7r+6xRa+17+XJzooe76vd1v+1uXd3gYu 90pzqTrz1X17XpWcDVlUrCH9N2/unjeRux+a/T5qUOvgJ81VG7Tdn//ZozgV/RmZU86xpvBZ P6r69ez87dVpGXwHXxTNU2Ipzkg01GIuKk4EANqosb4IAgAA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140107_094935_044027_70E23171 X-CRM114-Status: UNSURE ( 9.61 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -6.9 (------) Cc: "moderated list:OPEN FIRMWARE AND..." , Kukjin Kim , Mike Turquette , Tomasz Figa , Andrzej Hajda , Kyungmin Park , "moderated list:ARM/S5P EXYNOS AR..." X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The patch replaces private enum clock IDs in the driver with macros provided by the DT header. Signed-off-by: Andrzej Hajda Signed-off-by: Kyungmin Park --- drivers/clk/samsung/clk-exynos5440.c | 81 +++++++++++++++--------------------- 1 file changed, 34 insertions(+), 47 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5440.c b/drivers/clk/samsung/clk-exynos5440.c index f865894..cbc15b5 100644 --- a/drivers/clk/samsung/clk-exynos5440.c +++ b/drivers/clk/samsung/clk-exynos5440.c @@ -9,6 +9,7 @@ * Common Clock Framework support for Exynos5440 SoC. */ +#include #include #include #include @@ -22,79 +23,65 @@ #define CPU_CLK_STATUS 0xfc #define MISC_DOUT1 0x558 -/* - * Let each supported clock get a unique id. This id is used to lookup the clock - * for device tree based platforms. - */ -enum exynos5440_clks { - none, xtal, arm_clk, - - spi_baud = 16, pb0_250, pr0_250, pr1_250, b_250, b_125, b_200, sata, - usb, gmac0, cs250, pb0_250_o, pr0_250_o, pr1_250_o, b_250_o, b_125_o, - b_200_o, sata_o, usb_o, gmac0_o, cs250_o, - - nr_clks, -}; - /* parent clock name list */ PNAME(mout_armclk_p) = { "cplla", "cpllb" }; PNAME(mout_spi_p) = { "div125", "div200" }; /* fixed rate clocks generated outside the soc */ static struct samsung_fixed_rate_clock exynos5440_fixed_rate_ext_clks[] __initdata = { - FRATE(none, "xtal", NULL, CLK_IS_ROOT, 0), + FRATE(0, "xtal", NULL, CLK_IS_ROOT, 0), }; /* fixed rate clocks */ static struct samsung_fixed_rate_clock exynos5440_fixed_rate_clks[] __initdata = { - FRATE(none, "ppll", NULL, CLK_IS_ROOT, 1000000000), - FRATE(none, "usb_phy0", NULL, CLK_IS_ROOT, 60000000), - FRATE(none, "usb_phy1", NULL, CLK_IS_ROOT, 60000000), - FRATE(none, "usb_ohci12", NULL, CLK_IS_ROOT, 12000000), - FRATE(none, "usb_ohci48", NULL, CLK_IS_ROOT, 48000000), + FRATE(0, "ppll", NULL, CLK_IS_ROOT, 1000000000), + FRATE(0, "usb_phy0", NULL, CLK_IS_ROOT, 60000000), + FRATE(0, "usb_phy1", NULL, CLK_IS_ROOT, 60000000), + FRATE(0, "usb_ohci12", NULL, CLK_IS_ROOT, 12000000), + FRATE(0, "usb_ohci48", NULL, CLK_IS_ROOT, 48000000), }; /* fixed factor clocks */ static struct samsung_fixed_factor_clock exynos5440_fixed_factor_clks[] __initdata = { - FFACTOR(none, "div250", "ppll", 1, 4, 0), - FFACTOR(none, "div200", "ppll", 1, 5, 0), - FFACTOR(none, "div125", "div250", 1, 2, 0), + FFACTOR(0, "div250", "ppll", 1, 4, 0), + FFACTOR(0, "div200", "ppll", 1, 5, 0), + FFACTOR(0, "div125", "div250", 1, 2, 0), }; /* mux clocks */ static struct samsung_mux_clock exynos5440_mux_clks[] __initdata = { - MUX(none, "mout_spi", mout_spi_p, MISC_DOUT1, 5, 1), - MUX_A(arm_clk, "arm_clk", mout_armclk_p, + MUX(0, "mout_spi", mout_spi_p, MISC_DOUT1, 5, 1), + MUX_A(CLK_ARM_CLK, "arm_clk", mout_armclk_p, CPU_CLK_STATUS, 0, 1, "armclk"), }; /* divider clocks */ static struct samsung_div_clock exynos5440_div_clks[] __initdata = { - DIV(spi_baud, "div_spi", "mout_spi", MISC_DOUT1, 3, 2), + DIV(CLK_SPI_BAUD, "div_spi", "mout_spi", MISC_DOUT1, 3, 2), }; /* gate clocks */ static struct samsung_gate_clock exynos5440_gate_clks[] __initdata = { - GATE(pb0_250, "pb0_250", "div250", CLKEN_OV_VAL, 3, 0, 0), - GATE(pr0_250, "pr0_250", "div250", CLKEN_OV_VAL, 4, 0, 0), - GATE(pr1_250, "pr1_250", "div250", CLKEN_OV_VAL, 5, 0, 0), - GATE(b_250, "b_250", "div250", CLKEN_OV_VAL, 9, 0, 0), - GATE(b_125, "b_125", "div125", CLKEN_OV_VAL, 10, 0, 0), - GATE(b_200, "b_200", "div200", CLKEN_OV_VAL, 11, 0, 0), - GATE(sata, "sata", "div200", CLKEN_OV_VAL, 12, 0, 0), - GATE(usb, "usb", "div200", CLKEN_OV_VAL, 13, 0, 0), - GATE(gmac0, "gmac0", "div200", CLKEN_OV_VAL, 14, 0, 0), - GATE(cs250, "cs250", "div250", CLKEN_OV_VAL, 19, 0, 0), - GATE(pb0_250_o, "pb0_250_o", "pb0_250", CLKEN_OV_VAL, 3, 0, 0), - GATE(pr0_250_o, "pr0_250_o", "pr0_250", CLKEN_OV_VAL, 4, 0, 0), - GATE(pr1_250_o, "pr1_250_o", "pr1_250", CLKEN_OV_VAL, 5, 0, 0), - GATE(b_250_o, "b_250_o", "b_250", CLKEN_OV_VAL, 9, 0, 0), - GATE(b_125_o, "b_125_o", "b_125", CLKEN_OV_VAL, 10, 0, 0), - GATE(b_200_o, "b_200_o", "b_200", CLKEN_OV_VAL, 11, 0, 0), - GATE(sata_o, "sata_o", "sata", CLKEN_OV_VAL, 12, 0, 0), - GATE(usb_o, "usb_o", "usb", CLKEN_OV_VAL, 13, 0, 0), - GATE(gmac0_o, "gmac0_o", "gmac", CLKEN_OV_VAL, 14, 0, 0), - GATE(cs250_o, "cs250_o", "cs250", CLKEN_OV_VAL, 19, 0, 0), + GATE(CLK_PB0_250, "pb0_250", "div250", CLKEN_OV_VAL, 3, 0, 0), + GATE(CLK_PR0_250, "pr0_250", "div250", CLKEN_OV_VAL, 4, 0, 0), + GATE(CLK_PR1_250, "pr1_250", "div250", CLKEN_OV_VAL, 5, 0, 0), + GATE(CLK_B_250, "b_250", "div250", CLKEN_OV_VAL, 9, 0, 0), + GATE(CLK_B_125, "b_125", "div125", CLKEN_OV_VAL, 10, 0, 0), + GATE(CLK_B_200, "b_200", "div200", CLKEN_OV_VAL, 11, 0, 0), + GATE(CLK_SATA, "sata", "div200", CLKEN_OV_VAL, 12, 0, 0), + GATE(CLK_USB, "usb", "div200", CLKEN_OV_VAL, 13, 0, 0), + GATE(CLK_GMAC0, "gmac0", "div200", CLKEN_OV_VAL, 14, 0, 0), + GATE(CLK_CS250, "cs250", "div250", CLKEN_OV_VAL, 19, 0, 0), + GATE(CLK_PB0_250_O, "pb0_250_o", "pb0_250", CLKEN_OV_VAL, 3, 0, 0), + GATE(CLK_PR0_250_O, "pr0_250_o", "pr0_250", CLKEN_OV_VAL, 4, 0, 0), + GATE(CLK_PR1_250_O, "pr1_250_o", "pr1_250", CLKEN_OV_VAL, 5, 0, 0), + GATE(CLK_B_250_O, "b_250_o", "b_250", CLKEN_OV_VAL, 9, 0, 0), + GATE(CLK_B_125_O, "b_125_o", "b_125", CLKEN_OV_VAL, 10, 0, 0), + GATE(CLK_B_200_O, "b_200_o", "b_200", CLKEN_OV_VAL, 11, 0, 0), + GATE(CLK_SATA_O, "sata_o", "sata", CLKEN_OV_VAL, 12, 0, 0), + GATE(CLK_USB_O, "usb_o", "usb", CLKEN_OV_VAL, 13, 0, 0), + GATE(CLK_GMAC0_O, "gmac0_o", "gmac", CLKEN_OV_VAL, 14, 0, 0), + GATE(CLK_CS250_O, "cs250_o", "cs250", CLKEN_OV_VAL, 19, 0, 0), }; static struct of_device_id ext_clk_match[] __initdata = { @@ -114,7 +101,7 @@ static void __init exynos5440_clk_init(struct device_node *np) return; } - samsung_clk_init(np, reg_base, nr_clks, NULL, 0, NULL, 0); + samsung_clk_init(np, reg_base, CLK_NR_CLKS, NULL, 0, NULL, 0); samsung_clk_of_register_fixed_ext(exynos5440_fixed_rate_ext_clks, ARRAY_SIZE(exynos5440_fixed_rate_ext_clks), ext_clk_match);