From patchwork Thu Jan 23 22:38:06 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 3532311 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 626DF9F39B for ; Thu, 23 Jan 2014 22:40:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8EF1C201CE for ; Thu, 23 Jan 2014 22:40:45 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 924C7201C8 for ; Thu, 23 Jan 2014 22:40:44 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W6Sw8-0008BA-4t; Thu, 23 Jan 2014 22:39:49 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1W6Svl-0000JE-Lr; Thu, 23 Jan 2014 22:39:25 +0000 Received: from mail-ea0-f169.google.com ([209.85.215.169]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W6Sva-0000GA-80 for linux-arm-kernel@lists.infradead.org; Thu, 23 Jan 2014 22:39:14 +0000 Received: by mail-ea0-f169.google.com with SMTP id l9so575804eaj.28 for ; Thu, 23 Jan 2014 14:38:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=v1hVYhUFLFsjDD3nvKloi2EEXkKdu34optTneP2BGIA=; b=RdsGrfiNbIXAstX4OYJD+AJhR5sUr22WkLONYwY4+ayrqPL9dbj+Nw7X6bKrhcpdmk dQVA2i4c07SGBWF7usvLykOHtpUrFLKZwEe84rKAXN2p1WOmM2tvFbg+i1btzOpxPgz/ iT5X4fBv8fdW+7xsOh+COElUMMo+ijDG05d7kzkd4eq33hYAp67/VETY2al6J6ayxlQy l2hvcvNZx8LS4HBy4zkt75IrHufRd//ZFN0RbzjumkI2LQVuvAu4hMWstx7Nx9CLYKYw 453x/mwKiyW1y/jcwN/9IxiDSK13NjdWwKSnZpPAFWilCNPXpJmUI78aZ4854cmN/cr8 6nzw== X-Received: by 10.14.194.131 with SMTP id m3mr9637533een.2.1390516695587; Thu, 23 Jan 2014 14:38:15 -0800 (PST) Received: from topkick.lan (dslc-082-083-251-183.pools.arcor-ip.net. [82.83.251.183]) by mx.google.com with ESMTPSA id 46sm43857656ees.4.2014.01.23.14.38.13 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 23 Jan 2014 14:38:14 -0800 (PST) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Subject: [PATCH 3/3] irqchip: orion: clear stale interrupts in irq_enable Date: Thu, 23 Jan 2014 23:38:06 +0100 Message-Id: <1390516686-2224-4-git-send-email-sebastian.hesselbarth@gmail.com> In-Reply-To: <1390516686-2224-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1390516686-2224-1-git-send-email-sebastian.hesselbarth@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140123_173914_398815_BBECE800 X-CRM114-Status: GOOD ( 11.33 ) X-Spam-Score: -2.7 (--) Cc: Andrew Lunn , Jason Cooper , linux-kernel@vger.kernel.org, Jason Gunthorpe , Ezequiel Garcia , Gregory Clement , Thomas Gleixner , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Bridge IRQ_CAUSE bits are asserted regardless of the corresponding bit in IRQ_MASK register. To avoid interrupt events on stale irqs, we have to clear them before unmask. This installs an .irq_enable callback to ensure stale irqs are cleared before initial unmask. Signed-off-by: Sebastian Hesselbarth --- Cc: Thomas Gleixner Cc: Jason Cooper Cc: Andrew Lunn Cc: Gregory Clement Cc: Jason Gunthorpe Cc: Ezequiel Garcia Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- drivers/irqchip/irq-orion.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/irqchip/irq-orion.c b/drivers/irqchip/irq-orion.c index 1f636f719065..80b13c1a0947 100644 --- a/drivers/irqchip/irq-orion.c +++ b/drivers/irqchip/irq-orion.c @@ -123,6 +123,18 @@ static void orion_bridge_irq_handler(unsigned int irq, struct irq_desc *desc) } } +/* + * Bridge IRQ_CAUSE is asserted regardless of IRQ_MASK register. + * To avoid interrupt events on stale irqs, we clear them before unmask. + */ +static void orion_bridge_irq_enable(struct irq_data *d) +{ + struct irq_chip_type *ct = irq_data_get_chip_type(d); + + ct->chip.irq_ack(d); + ct->chip.irq_unmask(d); +} + static int __init orion_bridge_irq_init(struct device_node *np, struct device_node *parent) { @@ -176,6 +188,7 @@ static int __init orion_bridge_irq_init(struct device_node *np, gc->chip_types[0].regs.ack = ORION_BRIDGE_IRQ_CAUSE; gc->chip_types[0].regs.mask = ORION_BRIDGE_IRQ_MASK; + gc->chip_types[0].chip.irq_enable = orion_bridge_irq_enable; gc->chip_types[0].chip.irq_ack = irq_gc_ack_clr_bit; gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;