From patchwork Thu Feb 6 19:12:57 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 3598041 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 82515BF418 for ; Thu, 6 Feb 2014 19:21:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A8300200FE for ; Thu, 6 Feb 2014 19:21:48 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A8999200FF for ; Thu, 6 Feb 2014 19:21:47 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WBUQk-0007C4-3b; Thu, 06 Feb 2014 19:16:12 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WBUPp-0000oO-Io; Thu, 06 Feb 2014 19:15:13 +0000 Received: from mailout3.w1.samsung.com ([210.118.77.13]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WBUON-0000cI-Sg for linux-arm-kernel@lists.infradead.org; Thu, 06 Feb 2014 19:13:47 +0000 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N0L00IR19DYXJA0@mailout3.w1.samsung.com> for linux-arm-kernel@lists.infradead.org; Thu, 06 Feb 2014 19:13:10 +0000 (GMT) X-AuditID: cbfec7f5-b7fc96d000004885-40-52f3dec69506 Received: from eusync4.samsung.com ( [203.254.199.214]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id D1.84.18565.6CED3F25; Thu, 06 Feb 2014 19:13:10 +0000 (GMT) Received: from AMDC1227.digital.local ([106.116.147.199]) by eusync4.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N0L002UD9DPUJ50@eusync4.samsung.com>; Thu, 06 Feb 2014 19:13:10 +0000 (GMT) From: Tomasz Figa To: linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 12/12] ARM: exynos: Allow wake-up using GIC interrupts Date: Thu, 06 Feb 2014 20:12:57 +0100 Message-id: <1391713977-22300-13-git-send-email-t.figa@samsung.com> X-Mailer: git-send-email 1.8.5.2 In-reply-to: <1391713977-22300-1-git-send-email-t.figa@samsung.com> References: <1391713977-22300-1-git-send-email-t.figa@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpiluLIzCtJLcpLzFFi42I5/e/4Nd1j9z4HGSw/zWbxd9Ixdouzyw6y WfQuuMpmcbbpDbvFpsfXWC1mnN/HZLH2yF12i1PXP7NZrJ/xmsWB0+P3r0mMHrMbLrJ4bF5S 73HlRBOrR9+WVYwenzfJBbBFcdmkpOZklqUW6dslcGX82raDreCWcMX97lbmBsZX/F2MnBwS AiYSMx5OZIawxSQu3FvP1sXIxSEksJRRYmHvCnYIp49J4lBnKztIFZuAmsTnhkdsILaIgKrE 57YFYHFmgc1MEmuOOIHYwgKeEmff9bOA2CxANU/nfAKq5+DgFXCWuPhaB8SUEFCQWH1dCKSC EyjaPmEHE4gtJOAkcffyPfYJjLwLGBlWMYqmliYXFCel5xrpFSfmFpfmpesl5+duYoSE29cd jEuPWR1iFOBgVOLhVVzxOUiINbGsuDL3EKMEB7OSCK/tHaAQb0piZVVqUX58UWlOavEhRiYO TqkGxu1zoq35Dn1vb+B2PnXSr3jzhPk/3Df9Wfu/8KOTc81s9sUdspkHdpoFukkztN/cZN2y ryd4446P5SkBe7N9am/rzFNS793IfuaHGG/P/kfz1vis9mn4y+Ub/0FWVrvKWDaS2d5x9pGr 0vW1VicrHBwfb9n5zkhQyU/wU37QpRC21EdLu1IfKrEUZyQaajEXFScCAC+STucVAgAA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140206_141344_106456_375052D1 X-CRM114-Status: GOOD ( 15.63 ) X-Spam-Score: -7.4 (-------) Cc: Kukjin Kim , Arnd Bergmann , Tomasz Figa , Doug Anderson , Kyungmin Park , Olof Johansson , linux-arm-kernel@lists.infradead.org, Marek Szyprowski X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch restores the ability to receive wake-up events from internal GIC interrupts, e.g. RTC tick or alarm interrupts. Signed-off-by: Tomasz Figa Acked-by: Kyungmin Park --- arch/arm/mach-exynos/pm.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index ada1c83..15af0ce 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -35,6 +36,16 @@ #include "common.h" #include "regs-pmu.h" +/** + * struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping + * @hwirq: Hardware IRQ signal of the GIC + * @mask: Mask in PMU wake-up mask register + */ +struct exynos_wkup_irq { + unsigned int hwirq; + u32 mask; +}; + static struct sleep_save exynos5_sys_save[] = { SAVE_ITEM(EXYNOS5_SYS_I2C_CFG), }; @@ -48,8 +59,47 @@ static struct sleep_save exynos_core_save[] = { SAVE_ITEM(S5P_SROM_BC3), }; +/* + * GIC wake-up support + */ + static u32 exynos_irqwake_intmask = 0xffffffff; +static const struct exynos_wkup_irq exynos4_wkup_irq[] = { + { 76, BIT(1) }, /* RTC alarm */ + { 77, BIT(2) }, /* RTC tick */ + { /* sentinel */ }, +}; + +static const struct exynos_wkup_irq exynos5250_wkup_irq[] = { + { 75, BIT(1) }, /* RTC alarm */ + { 76, BIT(2) }, /* RTC tick */ + { /* sentinel */ }, +}; + +static int exynos_irq_set_wake(struct irq_data *data, unsigned int state) +{ + const struct exynos_wkup_irq *wkup_irq; + + if (soc_is_exynos5250()) + wkup_irq = exynos5250_wkup_irq; + else + wkup_irq = exynos4_wkup_irq; + + while (wkup_irq->mask) { + if (wkup_irq->hwirq == data->hwirq) { + if (!state) + exynos_irqwake_intmask |= wkup_irq->mask; + else + exynos_irqwake_intmask &= ~wkup_irq->mask; + return 0; + } + ++wkup_irq; + } + + return -ENOENT; +} + /* For Cortex-A9 Diagnostic and Power control register */ static unsigned int save_arm_register[2]; @@ -258,6 +308,9 @@ void __init exynos_pm_init(void) { u32 tmp; + /* Platform-specific GIC callback */ + gic_arch_extn.irq_set_wake = exynos_irq_set_wake; + /* All wakeup disable */ tmp = __raw_readl(S5P_WAKEUP_MASK); tmp |= ((0xFF << 8) | (0x1F << 1));