From patchwork Fri Feb 21 17:46:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loc Ho X-Patchwork-Id: 3699091 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 2CFEBBF13A for ; Fri, 21 Feb 2014 17:49:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5003120125 for ; Fri, 21 Feb 2014 17:49:55 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 223F72011E for ; Fri, 21 Feb 2014 17:49:54 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WGuDB-0000j5-PV; Fri, 21 Feb 2014 17:48:34 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WGuCr-0003WD-Kl; Fri, 21 Feb 2014 17:48:13 +0000 Received: from exprod5og108.obsmtp.com ([64.18.0.186]) by merlin.infradead.org with smtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WGuCJ-0003RC-V4 for linux-arm-kernel@lists.infradead.org; Fri, 21 Feb 2014 17:47:42 +0000 Received: from mail-pb0-f44.google.com ([209.85.160.44]) (using TLSv1) by exprod5ob108.postini.com ([64.18.4.12]) with SMTP ID DSNKUweRJmli4KYKTB7knZAHjfNc+yPxuWXR@postini.com; Fri, 21 Feb 2014 09:47:39 PST Received: by mail-pb0-f44.google.com with SMTP id rq2so3770297pbb.3 for ; Fri, 21 Feb 2014 09:47:18 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XqZ3Rt/qmajVCPQuSfZeAvwbNQ0WxXzjRslj0I6ql1w=; b=eiRDy1xEaiW4NMb+ym1zRh32HwP0hNadENCBakonLNe/pkczP5WgdsV+rGiUkGmaFD CbHivqAgcggVB5d1dscAVoOL+YQ++NhC0J18eMfJgedjp5yr+XyTnhmt4aUsKVG3+4TR MnXdd9esJmIAmFO2AqjZKMvX5HsERPkL4LfKCp9XLfCZ17IMgGvUFpGEcK7RtPvC5vnH +hUIM1sdYpH5I4408JpzKbOGBcUASA7W8sUhJCgRtaUvGx4zmTmPbVBl+2/mRIhUFsox VWUk64QWjp7zjLLn2WCZu7rviK92BYxoIjjX/BzMzikJQAkKJ21JxOYr050QxY0DJKUc d3fQ== X-Gm-Message-State: ALoCoQlgfXJ9i+34IMqz4iNN1IurhK6Va9orUQ3XeBYQllQrNSwE09Gipt0q/3iV/m5TyGP9OyGzba8srAmlJ70DSOTSWvCrI6Cypp0gUhXq4bMY1BuXVKw3UCG9uIQoR/SoS4n+h3BS11LGaO5vMeBjWE9GPeemlru9Vhr0bXEqg7SxPS2Qh2k67g4QFcRGTO+NGO+tCidN X-Received: by 10.68.162.66 with SMTP id xy2mr10684040pbb.46.1393004838398; Fri, 21 Feb 2014 09:47:18 -0800 (PST) X-Received: by 10.68.162.66 with SMTP id xy2mr10684027pbb.46.1393004838310; Fri, 21 Feb 2014 09:47:18 -0800 (PST) Received: from localhost ([198.137.200.11]) by mx.google.com with ESMTPSA id ix2sm20267675pbc.45.2014.02.21.09.47.17 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 21 Feb 2014 09:47:17 -0800 (PST) From: Loc Ho To: olof@lixom.net, tj@kernel.org, arnd@arndb.de Subject: [PATCH v10 4/4] arm64: Add APM X-Gene SoC 15Gbps Multi-purpose PHY DTS entries Date: Fri, 21 Feb 2014 10:46:41 -0700 Message-Id: <1393004801-25970-5-git-send-email-lho@apm.com> X-Mailer: git-send-email 1.5.5 In-Reply-To: <1393004801-25970-4-git-send-email-lho@apm.com> References: <1393004801-25970-1-git-send-email-lho@apm.com> <1393004801-25970-2-git-send-email-lho@apm.com> <1393004801-25970-3-git-send-email-lho@apm.com> <1393004801-25970-4-git-send-email-lho@apm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140221_124740_167052_467C23A7 X-CRM114-Status: UNSURE ( 9.97 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -3.2 (---) Cc: devicetree@vger.kernel.org, Suman Tripathi , linux-scsi@vger.kernel.org, jcm@redhat.com, patches@apm.com, linux-ide@vger.kernel.org, ddutile@redhat.com, Loc Ho , Tuan Phan , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the DTS entries for the APM X-Gene SoC 15Gbps Multi-purpose PHY driver. The PHY for SATA controller 2 and 3 are enabled by default. Signed-off-by: Loc Ho Signed-off-by: Tuan Phan Signed-off-by: Suman Tripathi --- arch/arm64/boot/dts/apm-storm.dtsi | 75 ++++++++++++++++++++++++++++++++++++ 1 files changed, 75 insertions(+), 0 deletions(-) diff --git a/arch/arm64/boot/dts/apm-storm.dtsi b/arch/arm64/boot/dts/apm-storm.dtsi index d37d736..c78ddcf 100644 --- a/arch/arm64/boot/dts/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm-storm.dtsi @@ -176,6 +176,51 @@ reg-names = "csr-reg"; clock-output-names = "eth8clk"; }; + + sataphy1clk: sataphy1clk@1f21c000 { + compatible = "apm,xgene-device-clock"; + #clock-cells = <1>; + clocks = <&socplldiv2 0>; + clock-names = "socplldiv2"; + reg = <0x0 0x1f21c000 0x0 0x1000>; + reg-names = "csr-reg"; + clock-output-names = "sataphy1clk"; + status = "disabled"; + csr-offset = <0x4>; + csr-mask = <0x00>; + enable-offset = <0x0>; + enable-mask = <0x06>; + }; + + sataphy2clk: sataphy1clk@1f22c000 { + compatible = "apm,xgene-device-clock"; + #clock-cells = <1>; + clocks = <&socplldiv2 0>; + clock-names = "socplldiv2"; + reg = <0x0 0x1f22c000 0x0 0x1000>; + reg-names = "csr-reg"; + clock-output-names = "sataphy2clk"; + status = "ok"; + csr-offset = <0x4>; + csr-mask = <0x3a>; + enable-offset = <0x0>; + enable-mask = <0x06>; + }; + + sataphy3clk: sataphy1clk@1f23c000 { + compatible = "apm,xgene-device-clock"; + #clock-cells = <1>; + clocks = <&socplldiv2 0>; + clock-names = "socplldiv2"; + reg = <0x0 0x1f23c000 0x0 0x1000>; + reg-names = "csr-reg"; + clock-output-names = "sataphy3clk"; + status = "ok"; + csr-offset = <0x4>; + csr-mask = <0x3a>; + enable-offset = <0x0>; + enable-mask = <0x06>; + }; }; serial0: serial@1c020000 { @@ -187,5 +232,35 @@ interrupt-parent = <&gic>; interrupts = <0x0 0x4c 0x4>; }; + + phy1: phy@1f21a000 { + compatible = "apm,xgene-phy"; + reg = <0x0 0x1f21a000 0x0 0x100>; + #phy-cells = <1>; + clocks = <&sataphy1clk 0>; + status = "disabled"; + apm,tx-boost-gain = <30 30 30 30 30 30>; + apm,tx-eye-tuning = <2 10 10 2 10 10>; + }; + + phy2: phy@1f22a000 { + compatible = "apm,xgene-phy"; + reg = <0x0 0x1f22a000 0x0 0x100>; + #phy-cells = <1>; + clocks = <&sataphy2clk 0>; + status = "ok"; + apm,tx-boost-gain = <30 30 30 30 30 30>; + apm,tx-eye-tuning = <1 10 10 2 10 10>; + }; + + phy3: phy@1f23a000 { + compatible = "apm,xgene-phy"; + reg = <0x0 0x1f23a000 0x0 0x100>; + #phy-cells = <1>; + clocks = <&sataphy3clk 0>; + status = "ok"; + apm,tx-boost-gain = <31 31 31 31 31 31>; + apm,tx-eye-tuning = <2 10 10 2 10 10>; + }; }; };