From patchwork Mon Mar 3 09:53:21 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean Pihet X-Patchwork-Id: 3752571 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E32989F1EE for ; Mon, 3 Mar 2014 09:55:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F2A4220259 for ; Mon, 3 Mar 2014 09:55:07 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D886E2024D for ; Mon, 3 Mar 2014 09:55:06 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WKPZp-00050x-KP; Mon, 03 Mar 2014 09:54:25 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WKPZi-00012a-14; Mon, 03 Mar 2014 09:54:18 +0000 Received: from mail-pb0-f51.google.com ([209.85.160.51]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WKPZT-0000yS-U9 for linux-arm-kernel@lists.infradead.org; Mon, 03 Mar 2014 09:54:07 +0000 Received: by mail-pb0-f51.google.com with SMTP id uo5so2874308pbc.38 for ; Mon, 03 Mar 2014 01:53:42 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hdeJIHQRR6466DEouNWKqlvU8mn4pyJKXrB+w4HYmyc=; b=Kyacd5Uhv1sZ+hW34NZFtG3NiS5xB0fTPtJDBg0DeE88Tl0QTGdWWfJbFIKicNKWFT eM2uuc6ePAxC/eJqVIny3TqXhhT95FxuNYvwc4sB76o1l+fVcSFCwPU+gyMl6JMgC3MU 0mFd9QbiUTd0buf/vA/kdrR2tbu/3p4Ms3sPbNxOsUJbWpBzJwSO+x35gAJhHukpYAy/ 2ra56Ob0JOldpsN2H/mdRb2/9JaKNT9PzxLZpj99rvaz5OzHU3khUokbx110z9rOtvch pYnonr17OAwdokQAJWUAU9F1yCQnK+UYPruPKFEuUugilj3ETPAtntC2+BzuW6XwFl6Y gfvg== X-Gm-Message-State: ALoCoQkjk9Lv2IzOaeZ+wJW7v5nDdW3c2dHcldXHMQpcn1rvyDriclH7eAAbVfTfLLfh+2meU91h X-Received: by 10.68.139.100 with SMTP id qx4mr2477589pbb.144.1393840421561; Mon, 03 Mar 2014 01:53:41 -0800 (PST) Received: from localhost.localdomain (z88l218.static.ctm.net. [202.175.88.218]) by mx.google.com with ESMTPSA id ha11sm2802046pbd.17.2014.03.03.01.53.36 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 03 Mar 2014 01:53:40 -0800 (PST) From: Jean Pihet To: linux-kernel@vger.kernel.org, linaro-kernel@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Arnaldo , Ingo Molnar , Jiri Olsa Subject: [PATCH 1/3] perf tests: Introduce perf_regs_load function on ARM Date: Mon, 3 Mar 2014 10:53:21 +0100 Message-Id: <1393840403-26639-2-git-send-email-jean.pihet@linaro.org> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1393840403-26639-1-git-send-email-jean.pihet@linaro.org> References: <1393840403-26639-1-git-send-email-jean.pihet@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140303_045404_082205_168FAF2A X-CRM114-Status: GOOD ( 14.21 ) X-Spam-Score: 1.8 (+) Cc: steve.capper@linaro.org, Peter Zijlstra , Corey Ashford , Frederic Weisbecker , patches@linaro.org, Will Deacon , Paul Mackerras , David Ahern , Namhyung Kim , Jean Pihet X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=0.5 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY, URIBL_BLACK autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Introducing perf_regs_load function, which is going to be used for dwarf unwind test in following patches. It takes single argument as a pointer to the regs dump buffer and populates it with current registers values. Signed-off-by: Jean Pihet Cc: Corey Ashford Cc: Frederic Weisbecker Cc: Ingo Molnar Cc: Namhyung Kim Cc: Paul Mackerras Cc: Peter Zijlstra Cc: Arnaldo Carvalho de Melo Cc: David Ahern Cc: Jiri Olsa --- tools/perf/arch/arm/Makefile | 1 + tools/perf/arch/arm/include/perf_regs.h | 2 ++ tools/perf/arch/arm/tests/regs_load.S | 51 +++++++++++++++++++++++++++++++++ 3 files changed, 54 insertions(+) create mode 100644 tools/perf/arch/arm/tests/regs_load.S diff --git a/tools/perf/arch/arm/Makefile b/tools/perf/arch/arm/Makefile index 67e9b3d..9b8f87e 100644 --- a/tools/perf/arch/arm/Makefile +++ b/tools/perf/arch/arm/Makefile @@ -4,4 +4,5 @@ LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o endif ifndef NO_LIBUNWIND LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/unwind-libunwind.o +LIB_OBJS += $(OUTPUT)arch/$(ARCH)/tests/regs_load.o endif diff --git a/tools/perf/arch/arm/include/perf_regs.h b/tools/perf/arch/arm/include/perf_regs.h index 2a1cfde..1476ae7 100644 --- a/tools/perf/arch/arm/include/perf_regs.h +++ b/tools/perf/arch/arm/include/perf_regs.h @@ -5,6 +5,8 @@ #include "../../util/types.h" #include +void perf_regs_load(u64 *regs); + #define PERF_REGS_MASK ((1ULL << PERF_REG_ARM_MAX) - 1) #define PERF_REG_IP PERF_REG_ARM_PC #define PERF_REG_SP PERF_REG_ARM_SP diff --git a/tools/perf/arch/arm/tests/regs_load.S b/tools/perf/arch/arm/tests/regs_load.S new file mode 100644 index 0000000..241c6df --- /dev/null +++ b/tools/perf/arch/arm/tests/regs_load.S @@ -0,0 +1,51 @@ +#include + +#define R0 0x00 +#define R1 0x08 +#define R2 0x10 +#define R3 0x18 +#define R4 0x20 +#define R5 0x28 +#define R6 0x30 +#define R7 0x38 +#define R8 0x40 +#define R9 0x48 +#define SL 0x50 +#define FP 0x58 +#define IP 0x60 +#define SP 0x68 +#define LR 0x70 +#define PC 0x78 + +@ Implementation of void perf_regs_load(u64 *regs); +@ +@ This functions fills in the 'regs' buffer from the actual registers values. +@ Note that the return values (i.e. caller values) of sp and lr +@ are retrieved and stored, in order to skip the call to this function. + +.text +.type perf_regs_load,%function +ENTRY(perf_regs_load) + push {r1} + + str r0, [r0, #R0] + str r1, [r0, #R1] + str r2, [r0, #R2] + str r3, [r0, #R3] + str r4, [r0, #R4] + str r5, [r0, #R5] + str r6, [r0, #R6] + str r7, [r0, #R7] + str r8, [r0, #R8] + str r9, [r0, #R9] + str sl, [r0, #SL] + str fp, [r0, #FP] + str ip, [r0, #IP] + add r1, sp, #4 @ Retrieve and save sp at entry time + str r1, [r0, #SP] + str lr, [r0, #LR] + str lr, [r0, #PC] @ Save caller PC + + pop {r1} + bx lr +ENDPROC(perf_regs_load)