From patchwork Mon Mar 3 19:51:40 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Warren X-Patchwork-Id: 3757181 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 652A1BF13A for ; Mon, 3 Mar 2014 19:55:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8FD6F2040F for ; Mon, 3 Mar 2014 19:55:01 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8B6ED203AF for ; Mon, 3 Mar 2014 19:55:00 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WKYvJ-0002a6-Ob; Mon, 03 Mar 2014 19:53:14 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WKYut-0003Pd-CV; Mon, 03 Mar 2014 19:52:47 +0000 Received: from avon.wwwdotorg.org ([70.85.31.133]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WKYuO-0003KL-Ob for linux-arm-kernel@lists.infradead.org; Mon, 03 Mar 2014 19:52:19 +0000 Received: from severn.wwwdotorg.org (unknown [192.168.65.5]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by avon.wwwdotorg.org (Postfix) with ESMTPS id B58636416; Mon, 3 Mar 2014 12:51:59 -0700 (MST) Received: from swarren-lx1.nvidia.com (localhost [127.0.0.1]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by severn.wwwdotorg.org (Postfix) with ESMTPSA id 9607FE4105; Mon, 3 Mar 2014 12:51:57 -0700 (MST) From: Stephen Warren To: Thomas Gleixner , Samuel Ortiz , Lee Jones , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala Subject: [PATCH V3 5/5] ARM: tegra: fix Dalmore PMIC IRQ polarity Date: Mon, 3 Mar 2014 12:51:40 -0700 Message-Id: <1393876300-3061-5-git-send-email-swarren@wwwdotorg.org> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1393876300-3061-1-git-send-email-swarren@wwwdotorg.org> References: <1393876300-3061-1-git-send-email-swarren@wwwdotorg.org> X-NVConfidentiality: public X-Virus-Scanned: clamav-milter 0.97.8 at avon.wwwdotorg.org X-Virus-Status: Clean X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140303_145216_971517_6A409181 X-CRM114-Status: GOOD ( 10.52 ) X-Spam-Score: 1.1 (+) Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, Stephen Warren , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Stephen Warren The Tegra PMC's resume-from-sleep logic wants an active-low IRQ input from the PMIC. However, the PMIC IRQ is also routed to the GIC, which only supports active high IRQs (or rising edge). Hence, the signal must be inverted in the PMC before being routed to the GIC. This implies that the PMC DT property nvidia,invert-interrupt must be set, and it is. The PMIC's DT interrupts property must represent the IRQ level at the GIC, since that is the PMIC's parent IRQ controller. Fix the PMIC's interrupts property to correctly describe the GIC input polarity. However, the PMIC IRQ output's polarity is programmable in HW, and by default follows the parent IRQ controller's input polarity. We need to have an active-low output due to the inversion inside the Tegra PMC. Hence, add the IRQ specifier flag which request that to the PMIC. Reported-by: Stefan Agner Signed-off-by: Stephen Warren --- v3: Update to match changes to IRQ specifier DT binding. v2: No change. --- arch/arm/boot/dts/tegra114-dalmore.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index 8de543777882..f4319ac1a401 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -893,7 +893,8 @@ palmas: tps65913@58 { compatible = "ti,palmas"; reg = <0x58>; - interrupts = <0 86 IRQ_TYPE_LEVEL_LOW>; + interrupts = <0 86 + (IRQ_TYPE_LEVEL_HIGH | IRQ_SRC_DST_INVERTED)>; #interrupt-cells = <2>; interrupt-controller;