From patchwork Thu Mar 6 00:24:13 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 3780541 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 791FEBF540 for ; Thu, 6 Mar 2014 00:28:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A487020204 for ; Thu, 6 Mar 2014 00:28:00 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9EFC620203 for ; Thu, 6 Mar 2014 00:27:59 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WLM8e-0003rp-IW; Thu, 06 Mar 2014 00:26:17 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WLM8E-0005vC-Dh; Thu, 06 Mar 2014 00:25:50 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WLM7L-0005jc-09 for linux-arm-kernel@lists.infradead.org; Thu, 06 Mar 2014 00:25:00 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s260ONKS000768; Wed, 5 Mar 2014 18:24:23 -0600 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s260ONhT010442; Wed, 5 Mar 2014 18:24:23 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Wed, 5 Mar 2014 18:24:22 -0600 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s260OM4H031229; Wed, 5 Mar 2014 18:24:22 -0600 Received: from localhost (irmo.am.dhcp.ti.com [128.247.71.175]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id s260OMt18367; Wed, 5 Mar 2014 18:24:22 -0600 (CST) From: Suman Anna To: Tony Lindgren , Benoit Cousson Subject: [PATCH 04/10] ARM: OMAP2+: use pdata quirks for iommu reset lines Date: Wed, 5 Mar 2014 18:24:13 -0600 Message-ID: <1394065459-16409-5-git-send-email-s-anna@ti.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1394065459-16409-1-git-send-email-s-anna@ti.com> References: <1394065459-16409-1-git-send-email-s-anna@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140305_192455_248969_7D5C2202 X-CRM114-Status: GOOD ( 11.81 ) X-Spam-Score: -6.9 (------) Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Paul Walmsley , Suman Anna , Joerg Roedel , iommu@lists.linux-foundation.org, Laurent Pinchart , linux-omap@vger.kernel.org, Florian Vaussard X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The OMAP iommu driver performs the reset management for the iommu instances in processor sub-systems using the omap_device API which are currently supplied as platform data ops. Use pdata quirks to maintain the functionality as the OMAP iommu driver gets converted to use DT nodes, until the reset portions are decoupled from omap_hwmod/omap_device into a separate reset driver. This patch adds the pdata quirks for the reset management of iommus within the DSP (OMAP3 & OMAP4) and IPU subsystems (OMAP4). Signed-off-by: Suman Anna --- arch/arm/mach-omap2/pdata-quirks.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 3d5b24d..74e094a 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -16,12 +16,14 @@ #include #include +#include #include "am35xx.h" #include "common.h" #include "common-board-devices.h" #include "dss-common.h" #include "control.h" +#include "omap_device.h" struct pdata_init { const char *compatible; @@ -92,6 +94,12 @@ static void __init hsmmc2_internal_input_clk(void) omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1); } +static struct iommu_platform_data omap3_iommu_pdata = { + .reset_name = "mmu", + .assert_reset = omap_device_assert_hardreset, + .deassert_reset = omap_device_deassert_hardreset, +}; + static int omap3_sbc_t3730_twl_callback(struct device *dev, unsigned gpio, unsigned ngpio) @@ -185,6 +193,12 @@ static void __init omap4_panda_legacy_init(void) legacy_init_ehci_clk("auxclk3_ck"); legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53); } + +static struct iommu_platform_data omap4_iommu_pdata = { + .reset_name = "mmu_cache", + .assert_reset = omap_device_assert_hardreset, + .deassert_reset = omap_device_deassert_hardreset, +}; #endif #ifdef CONFIG_SOC_OMAP5 @@ -240,6 +254,8 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { #ifdef CONFIG_ARCH_OMAP3 OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata), OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002a00, "48002a00.pinmux", &pcs_pdata), + OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu", + &omap3_iommu_pdata), /* Only on am3517 */ OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL), OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0", @@ -248,6 +264,10 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { #ifdef CONFIG_ARCH_OMAP4 OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a100040, "4a100040.pinmux", &pcs_pdata), OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a31e040, "4a31e040.pinmux", &pcs_pdata), + OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu", + &omap4_iommu_pdata), + OF_DEV_AUXDATA("ti,omap4-iommu", 0x55082000, "55082000.mmu", + &omap4_iommu_pdata), #endif { /* sentinel */ }, };