From patchwork Thu Mar 6 17:45:57 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 3785751 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4E602BF540 for ; Thu, 6 Mar 2014 17:48:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6946C20256 for ; Thu, 6 Mar 2014 17:48:08 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4EF632024C for ; Thu, 6 Mar 2014 17:48:07 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WLcNz-0001bb-Un; Thu, 06 Mar 2014 17:47:12 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WLcNn-00089M-H5; Thu, 06 Mar 2014 17:46:59 +0000 Received: from mail-gw3-out.broadcom.com ([216.31.210.64]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WLcNO-00084Y-9y for linux-arm-kernel@lists.infradead.org; Thu, 06 Mar 2014 17:46:36 +0000 X-IronPort-AV: E=Sophos;i="4.97,602,1389772800"; d="scan'208";a="17892746" Received: from irvexchcas06.broadcom.com (HELO IRVEXCHCAS06.corp.ad.broadcom.com) ([10.9.208.53]) by mail-gw3-out.broadcom.com with ESMTP; 06 Mar 2014 09:58:49 -0800 Received: from IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) by IRVEXCHCAS06.corp.ad.broadcom.com (10.9.208.53) with Microsoft SMTP Server (TLS) id 14.3.174.1; Thu, 6 Mar 2014 09:46:11 -0800 Received: from mail-irva-13.broadcom.com (10.10.10.20) by IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) with Microsoft SMTP Server id 14.3.174.1; Thu, 6 Mar 2014 09:46:11 -0800 Received: from fainelli-desktop.broadcom.com (unknown [10.12.164.252]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id B2359EAD81; Thu, 6 Mar 2014 09:46:10 -0800 (PST) From: Florian Fainelli To: Subject: [PATCH 4/6] ARM: BCM63XX: add BCM63138 minimal Device Tree Date: Thu, 6 Mar 2014 09:45:57 -0800 Message-ID: <1394127959-3159-5-git-send-email-f.fainelli@gmail.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1394127959-3159-1-git-send-email-f.fainelli@gmail.com> References: <1394127959-3159-1-git-send-email-f.fainelli@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140306_124634_596993_FCC95F28 X-CRM114-Status: UNSURE ( 9.24 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.3 (/) Cc: devicetree@vger.kernel.org, bcm@fixthebug.org, cernekee@gmail.com, mporter@linaro.org, jogo@openwrt.org, Florian Fainelli , mbizon@freebox.fr, jpeshkin@broadcom.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM,RCVD_IN_DNSWL_MED,T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a very minimalistic BCM63138 Device Tree include file which describes the BCM63138 SoC with only the basic set of required peripherals: - Cortex A9 CPU - ARM GIC - PL310 Level-2 cache controller - ARM TWD & Global timers - ARM TWD watchdog - legacy MIPS bus (UBUS) Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm63138.dtsi | 109 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 109 insertions(+) create mode 100644 arch/arm/boot/dts/bcm63138.dtsi diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi new file mode 100644 index 000000000000..190d6e53a85a --- /dev/null +++ b/arch/arm/boot/dts/bcm63138.dtsi @@ -0,0 +1,109 @@ +/* + * Broadcom BCM63138 DSL SoCs Device Tree + * + * Copyright (C) 2014 Broadcom Corporation + * + * Licensed under the GNU/GPL. See COPYING for details + */ + +#include +#include + +#include "skeleton.dtsi" + +/ { + compatible = "brcm,bcm63138"; + model = "Broadcom BCM63138 DSL SoC"; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + reg = <0>; + }; + }; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + arm_timer_clk: arm_timer_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <500000000>; + }; + }; + + /* ARM bus */ + axi@80000000 { + compatible = "simple-bus"; + ranges = <0 0x80000000 0x783003>; + reg = <0x80000000 0x783003>; + #address-cells = <1>; + #size-cells = <1>; + + L2: cache-controller@1d000 { + compatible = "arm,pl310-cache"; + reg = <0x1d000 0x1000>; + cache-unified; + cache-level = <2>; + interrupts = ; + }; + + mpcore@1e000 { + compatible = "simple-bus"; + reg = <0x1e000 0x20000>; + ranges = <0 0x1e000 0x20000>; + #address-cells = <1>; + #size-cells = <1>; + + scu: scu@0 { + compatible = "arm,cortex-a9-scu"; + reg = <0x0 0x100>; + }; + + gic: interrupt-controller@100 { + compatible = "arm,cortex-a9-gic"; + reg = <0x1000 0x1000 + 0x100 0x100>; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + }; + + global_timer: timer@200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x200 0x20>; + interrupts = ; + clocks = <&arm_timer_clk>; + }; + + local_timer: local-timer@600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x600 0x20>; + interrupts = ; + clocks = <&arm_timer_clk>; + }; + + twd_watchdog: watchdog@620 { + compatible = "arm,cortex-a9-twd-wdt"; + reg = <0x620 0x20>; + interupts = ; + }; + }; + }; + + /* Legacy UBUS base */ + ubus@fffe8000 { + compatible = "simple-bus"; + reg = <0xfffe8000 0x8053>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xfffe8000 0x8053>; + }; +};