| Message ID | 1394211863-7569-2-git-send-email-denis@eukrea.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Mar 07, 2014 at 06:04:16PM +0100, Denis Carikli wrote: > Signed-off-by: Denis Carikli <denis@eukrea.com> > --- > arch/arm/boot/dts/imx51.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi > index e508e6f..917b6ed 100644 > --- a/arch/arm/boot/dts/imx51.dtsi > +++ b/arch/arm/boot/dts/imx51.dtsi > @@ -100,6 +100,13 @@ > clocks = <&clks IMX5_CLK_USB_PHY_GATE>; > clock-names = "main_clk"; > }; > + > + usbphy1: usbphy@1 { > + compatible = "usb-nop-xceiv"; > + reg = <1>; > + clocks = <&clks IMX5_CLK_USB_PHY_GATE>; > + clock-names = "main_clk"; > + }; Is this the ulpi phy for host1 controller? Why the clock is the same with utmi phy clock for otg controller. > }; > > soc { > @@ -239,6 +246,7 @@ > interrupts = <14>; > clocks = <&clks IMX5_CLK_USBOH3_GATE>; > fsl,usbmisc = <&usbmisc 1>; > + fsl,usbphy = <&usbphy1>; > status = "disabled"; > }; > > -- > 1.7.9.5 > > >
???????????, 10 ????? 2014, 8:52 +08:00 ?? Peter Chen <peter.chen@freescale.com>: > On Fri, Mar 07, 2014 at 06:04:16PM +0100, Denis Carikli wrote: > > Signed-off-by: Denis Carikli <denis@eukrea.com> > > --- > > arch/arm/boot/dts/imx51.dtsi | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi > > index e508e6f..917b6ed 100644 > > --- a/arch/arm/boot/dts/imx51.dtsi > > +++ b/arch/arm/boot/dts/imx51.dtsi > > @@ -100,6 +100,13 @@ > > clocks = <&clks IMX5_CLK_USB_PHY_GATE>; > > clock-names = "main_clk"; > > }; > > + > > + usbphy1: usbphy@1 { > > + compatible = "usb-nop-xceiv"; > > + reg = <1>; > > + clocks = <&clks IMX5_CLK_USB_PHY_GATE>; > > + clock-names = "main_clk"; > > + }; > > Is this the ulpi phy for host1 controller? Why the clock is the same with utmi phy > clock for otg controller. As far as I know, for i.MX51 this is as it should be. However, I doubt the usefulness of forcing "fsl,usbphy = <&usbphy1>" below. > > soc { > > @@ -239,6 +246,7 @@ > > interrupts = <14>; > > clocks = <&clks IMX5_CLK_USBOH3_GATE>; > > fsl,usbmisc = <&usbmisc 1>; > > + fsl,usbphy = <&usbphy1>; > > status = "disabled"; > > }; ---
> > > > > > diff --git a/arch/arm/boot/dts/imx51.dtsi > > > b/arch/arm/boot/dts/imx51.dtsi index e508e6f..917b6ed 100644 > > > --- a/arch/arm/boot/dts/imx51.dtsi > > > +++ b/arch/arm/boot/dts/imx51.dtsi > > > @@ -100,6 +100,13 @@ > > > clocks = <&clks IMX5_CLK_USB_PHY_GATE>; > > > clock-names = "main_clk"; > > > }; > > > + > > > + usbphy1: usbphy@1 { > > > + compatible = "usb-nop-xceiv"; > > > + reg = <1>; > > > + clocks = <&clks IMX5_CLK_USB_PHY_GATE>; > > > + clock-names = "main_clk"; > > > + }; > > > > Is this the ulpi phy for host1 controller? Why the clock is the same > > with utmi phy clock for otg controller. > > As far as I know, for i.MX51 this is as it should be. > Are you sure? From clock file, they are different ccm clock gate. > However, I doubt the usefulness of forcing "fsl,usbphy = <&usbphy1>" > below. > Yes, for ulpi phy, it should use ulpi phy driver (drivers/usb/phy/phy-ulpi.c), not generic phy driver. Peter
???????????, 10 ????? 2014, 5:50 UTC ?? Peter Chen <Peter.Chen@freescale.com>: > > > > > > > > > diff --git a/arch/arm/boot/dts/imx51.dtsi > > > > b/arch/arm/boot/dts/imx51.dtsi index e508e6f..917b6ed 100644 > > > > --- a/arch/arm/boot/dts/imx51.dtsi > > > > +++ b/arch/arm/boot/dts/imx51.dtsi > > > > @@ -100,6 +100,13 @@ > > > > clocks = <&clks IMX5_CLK_USB_PHY_GATE>; > > > > clock-names = "main_clk"; > > > > }; > > > > + > > > > + usbphy1: usbphy@1 { > > > > + compatible = "usb-nop-xceiv"; > > > > + reg = <1>; > > > > + clocks = <&clks IMX5_CLK_USB_PHY_GATE>; > > > > + clock-names = "main_clk"; > > > > + }; > > > > > > Is this the ulpi phy for host1 controller? Why the clock is the same > > > with utmi phy clock for otg controller. > > > > As far as I know, for i.MX51 this is as it should be. > > > > Are you sure? From clock file, they are different ccm clock gate. clk-imx51-imx53.c ? I think you confuse with i.MX50/53. ---
> > > > > > > > > > > > diff --git a/arch/arm/boot/dts/imx51.dtsi > > > > > b/arch/arm/boot/dts/imx51.dtsi index e508e6f..917b6ed 100644 > > > > > --- a/arch/arm/boot/dts/imx51.dtsi > > > > > +++ b/arch/arm/boot/dts/imx51.dtsi > > > > > @@ -100,6 +100,13 @@ > > > > > clocks = <&clks IMX5_CLK_USB_PHY_GATE>; > > > > > clock-names = "main_clk"; > > > > > }; > > > > > + > > > > > + usbphy1: usbphy@1 { > > > > > + compatible = "usb-nop-xceiv"; > > > > > + reg = <1>; > > > > > + clocks = <&clks IMX5_CLK_USB_PHY_GATE>; > > > > > + clock-names = "main_clk"; > > > > > + }; > > > > > > > > Is this the ulpi phy for host1 controller? Why the clock is the > > > > same with utmi phy clock for otg controller. > > > > > > As far as I know, for i.MX51 this is as it should be. > > > > > > > Are you sure? From clock file, they are different ccm clock gate. > > clk-imx51-imx53.c ? I think you confuse with i.MX50/53. > Yes 341 clk[IMX5_CLK_USB_PHY1_GATE] = imx_clk_gate2("usb_phy1_gate", "usb_phy_sel", MXC_CCM_CCGR4, 10); 342 clk[IMX5_CLK_USB_PHY2_GATE] = imx_clk_gate2("usb_phy2_gate", "usb_phy_sel", MXC_CCM_CCGR4, 12);
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index e508e6f..917b6ed 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -100,6 +100,13 @@ clocks = <&clks IMX5_CLK_USB_PHY_GATE>; clock-names = "main_clk"; }; + + usbphy1: usbphy@1 { + compatible = "usb-nop-xceiv"; + reg = <1>; + clocks = <&clks IMX5_CLK_USB_PHY_GATE>; + clock-names = "main_clk"; + }; }; soc { @@ -239,6 +246,7 @@ interrupts = <14>; clocks = <&clks IMX5_CLK_USBOH3_GATE>; fsl,usbmisc = <&usbmisc 1>; + fsl,usbphy = <&usbphy1>; status = "disabled"; };
Signed-off-by: Denis Carikli <denis@eukrea.com> --- arch/arm/boot/dts/imx51.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)