| Message ID | 1394213289-29565-4-git-send-email-lho@apm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Sun, Mar 09, 2014 at 10:23:33PM -0700, Loc Ho wrote: > Hi Tejun, > > On Fri, Mar 7, 2014 at 9:28 AM, Loc Ho <lho@apm.com> wrote: > > > This patch adds the DTS entries for the APM X-Gene SoC 15Gbps Multi-purpose > > PHY driver. The PHY for SATA controller 2 and 3 are enabled by default. > > > > Signed-off-by: Loc Ho <lho@apm.com> > > Signed-off-by: Tuan Phan <tphan@apm.com> > > Signed-off-by: Suman Tripathi <stripathi@apm.com> > > --- > > arch/arm64/boot/dts/apm-storm.dtsi | 75 > > ++++++++++++++++++++++++++++++++++++ > > 1 files changed, 75 insertions(+), 0 deletions(-) > > > > > Kishon had pulled in the PHY doc/driver patches. Will you pulling in the > PHY DTS and the SATA host driver patches soon? Kishon, is the following branch the right one to pull into libata/for-3.15? git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy.git next Thanks.
On Tuesday 11 March 2014 02:15 AM, Tejun Heo wrote: > On Sun, Mar 09, 2014 at 10:23:33PM -0700, Loc Ho wrote: >> Hi Tejun, >> >> On Fri, Mar 7, 2014 at 9:28 AM, Loc Ho <lho@apm.com> wrote: >> >>> This patch adds the DTS entries for the APM X-Gene SoC 15Gbps Multi-purpose >>> PHY driver. The PHY for SATA controller 2 and 3 are enabled by default. >>> >>> Signed-off-by: Loc Ho <lho@apm.com> >>> Signed-off-by: Tuan Phan <tphan@apm.com> >>> Signed-off-by: Suman Tripathi <stripathi@apm.com> >>> --- >>> arch/arm64/boot/dts/apm-storm.dtsi | 75 >>> ++++++++++++++++++++++++++++++++++++ >>> 1 files changed, 75 insertions(+), 0 deletions(-) >>> >>> >> Kishon had pulled in the PHY doc/driver patches. Will you pulling in the >> PHY DTS and the SATA host driver patches soon? > > Kishon, is the following branch the right one to pull into > libata/for-3.15? > > git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy.git next My PULL request to Greg has this.. git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy.git tags/for_3.15 Btw you can add my Acked-by: Kishon Vijay Abraham I <kishon@ti.com> for this patch. Thanks Kishon
diff --git a/arch/arm64/boot/dts/apm-storm.dtsi b/arch/arm64/boot/dts/apm-storm.dtsi index d37d736..c78ddcf 100644 --- a/arch/arm64/boot/dts/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm-storm.dtsi @@ -176,6 +176,51 @@ reg-names = "csr-reg"; clock-output-names = "eth8clk"; }; + + sataphy1clk: sataphy1clk@1f21c000 { + compatible = "apm,xgene-device-clock"; + #clock-cells = <1>; + clocks = <&socplldiv2 0>; + clock-names = "socplldiv2"; + reg = <0x0 0x1f21c000 0x0 0x1000>; + reg-names = "csr-reg"; + clock-output-names = "sataphy1clk"; + status = "disabled"; + csr-offset = <0x4>; + csr-mask = <0x00>; + enable-offset = <0x0>; + enable-mask = <0x06>; + }; + + sataphy2clk: sataphy1clk@1f22c000 { + compatible = "apm,xgene-device-clock"; + #clock-cells = <1>; + clocks = <&socplldiv2 0>; + clock-names = "socplldiv2"; + reg = <0x0 0x1f22c000 0x0 0x1000>; + reg-names = "csr-reg"; + clock-output-names = "sataphy2clk"; + status = "ok"; + csr-offset = <0x4>; + csr-mask = <0x3a>; + enable-offset = <0x0>; + enable-mask = <0x06>; + }; + + sataphy3clk: sataphy1clk@1f23c000 { + compatible = "apm,xgene-device-clock"; + #clock-cells = <1>; + clocks = <&socplldiv2 0>; + clock-names = "socplldiv2"; + reg = <0x0 0x1f23c000 0x0 0x1000>; + reg-names = "csr-reg"; + clock-output-names = "sataphy3clk"; + status = "ok"; + csr-offset = <0x4>; + csr-mask = <0x3a>; + enable-offset = <0x0>; + enable-mask = <0x06>; + }; }; serial0: serial@1c020000 { @@ -187,5 +232,35 @@ interrupt-parent = <&gic>; interrupts = <0x0 0x4c 0x4>; }; + + phy1: phy@1f21a000 { + compatible = "apm,xgene-phy"; + reg = <0x0 0x1f21a000 0x0 0x100>; + #phy-cells = <1>; + clocks = <&sataphy1clk 0>; + status = "disabled"; + apm,tx-boost-gain = <30 30 30 30 30 30>; + apm,tx-eye-tuning = <2 10 10 2 10 10>; + }; + + phy2: phy@1f22a000 { + compatible = "apm,xgene-phy"; + reg = <0x0 0x1f22a000 0x0 0x100>; + #phy-cells = <1>; + clocks = <&sataphy2clk 0>; + status = "ok"; + apm,tx-boost-gain = <30 30 30 30 30 30>; + apm,tx-eye-tuning = <1 10 10 2 10 10>; + }; + + phy3: phy@1f23a000 { + compatible = "apm,xgene-phy"; + reg = <0x0 0x1f23a000 0x0 0x100>; + #phy-cells = <1>; + clocks = <&sataphy3clk 0>; + status = "ok"; + apm,tx-boost-gain = <31 31 31 31 31 31>; + apm,tx-eye-tuning = <2 10 10 2 10 10>; + }; }; };