From patchwork Fri Mar 14 19:25:30 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gerlach X-Patchwork-Id: 3834921 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 15F73BF540 for ; Fri, 14 Mar 2014 19:29:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5C37D20340 for ; Fri, 14 Mar 2014 19:29:42 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 339E220328 for ; Fri, 14 Mar 2014 19:29:41 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WOXld-0002X8-Qm; Fri, 14 Mar 2014 19:27:42 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WOXlC-0006xk-MT; Fri, 14 Mar 2014 19:27:14 +0000 Received: from devils.ext.ti.com ([198.47.26.153]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WOXkI-0006oi-0O for linux-arm-kernel@lists.infradead.org; Fri, 14 Mar 2014 19:26:26 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id s2EJPsM6023834; Fri, 14 Mar 2014 14:25:54 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2EJPsk7023112; Fri, 14 Mar 2014 14:25:54 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.174.1; Fri, 14 Mar 2014 14:25:54 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2EJPsdi025856; Fri, 14 Mar 2014 14:25:54 -0500 Received: from localhost (lta0274052.am.dhcp.ti.com [128.247.71.78]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id s2EJPst18986; Fri, 14 Mar 2014 14:25:54 -0500 (CDT) From: Dave Gerlach To: , , Subject: [RFC 4/9] ARM: dts: AM33XX: Add opp-modifier device entry and add higher OPPs Date: Fri, 14 Mar 2014 14:25:30 -0500 Message-ID: <1394825135-60110-5-git-send-email-d-gerlach@ti.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1394825135-60110-1-git-send-email-d-gerlach@ti.com> References: <1394825135-60110-1-git-send-email-d-gerlach@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140314_152618_633496_60031F3D X-CRM114-Status: GOOD ( 14.35 ) X-Spam-Score: -6.9 (------) Cc: Jisheng Zhang , devicetree@vger.kernel.org, Nishanth Menon , Dave Gerlach , Viresh Kumar , Anson Huang , "Rafael J. Wysocki" , cpufreq@vger.kernel.org, kernel@pengutronix.de, Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add an entry for opp_modifier which configures OPPs on am33xx. Within this nodes are defined with opp-modifier propety that are defined as a list of frequency, offset from base register, and efuse value. The CPU node passes a phandle to the appropriate child node of the efuse node. This patch also adds the ES2.x OPPs for am33xx. Signed-off-by: Dave Gerlach --- arch/arm/boot/dts/am33xx.dtsi | 27 +++++++++++++++++++++++++-- include/dt-bindings/opp/ti.h | 22 ++++++++++++++++++++++ 2 files changed, 47 insertions(+), 2 deletions(-) create mode 100644 include/dt-bindings/opp/ti.h diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 6d95d3d..a09f4fb 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -10,6 +10,7 @@ #include #include +#include #include "skeleton.dtsi" @@ -52,12 +53,17 @@ */ operating-points = < /* kHz uV */ + 1000000 1351000 + 800000 1285000 720000 1285000 600000 1225000 - 500000 1125000 - 275000 1125000 + 300000 1125000 >; + voltage-tolerance = <2>; /* 2 percentage */ + + platform-opp-modifier = <&mpu_opp_modifier>; + clock-latency = <300000>; /* From omap-cpufreq driver */ }; }; @@ -818,6 +824,23 @@ reg = <0x48310000 0x2000>; interrupts = <111>; }; + + opp_modifier: opp_modifier@0x44e107fc { + compatible = "opp-modifier-reg-bit"; + reg = <0x44e107fc 0x04>; + + opp,reg-bit-enable-low; + + mpu_opp_modifier: mpu_opp_modifier { + opp-modifier = < + /* kHz offset value */ + 1000000 0 AM33XX_EFUSE_SMA_OPP_NITRO_1GHZ_BIT + 800000 0 AM33XX_EFUSE_SMA_OPP_TURBO_800MHZ_BIT + 720000 0 AM33XX_EFUSE_SMA_OPP_120_720MHZ_BIT + 600000 0 AM33XX_EFUSE_SMA_OPP_100_600MHZ_BIT + >; + }; + }; }; }; diff --git a/include/dt-bindings/opp/ti.h b/include/dt-bindings/opp/ti.h new file mode 100644 index 0000000..58436c1 --- /dev/null +++ b/include/dt-bindings/opp/ti.h @@ -0,0 +1,22 @@ +/* + * This header provides constants for TI SoC OPP bindings. + * + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __DT_BINDINGS_OPP_TI_H__ +#define __DT_BINDINGS_OPP_TI_H__ + +#define AM33XX_EFUSE_SMA_OPP_50_300MHZ_BIT (1 << 4) +#define AM33XX_EFUSE_SMA_OPP_100_300MHZ_BIT (1 << 5) +#define AM33XX_EFUSE_SMA_OPP_100_600MHZ_BIT (1 << 6) +#define AM33XX_EFUSE_SMA_OPP_120_720MHZ_BIT (1 << 7) +#define AM33XX_EFUSE_SMA_OPP_TURBO_800MHZ_BIT (1 << 8) +#define AM33XX_EFUSE_SMA_OPP_NITRO_1GHZ_BIT (1 << 9) + +#endif /* __DT_BINDINGS_OPP_TI_H__ */