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[81.241.102.90]) by mx.google.com with ESMTPSA id n5sm3004316eex.14.2014.03.19.02.42.50 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 19 Mar 2014 02:42:51 -0700 (PDT) From: Jean Pihet To: "linux-kernel@vger.kernel.org" , "linaro-kernel@lists.linaro.org" , "linux-arm-kernel@lists.infradead.org" , Arnaldo , Ingo Molnar , Jiri Olsa , Steve Capper , Mark Rutland Subject: [PATCH 1/3] perf tests: Introduce perf_regs_load function on ARM64 Date: Wed, 19 Mar 2014 10:42:33 +0100 Message-Id: <1395222155-22205-2-git-send-email-jean.pihet@linaro.org> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1395222155-22205-1-git-send-email-jean.pihet@linaro.org> References: <1395222155-22205-1-git-send-email-jean.pihet@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140319_054318_399578_E090E665 X-CRM114-Status: GOOD ( 15.43 ) X-Spam-Score: -0.9 (/) Cc: Peter Zijlstra , Corey Ashford , Frederic Weisbecker , patches@linaro.org, Paul Mackerras , David Ahern , Namhyung Kim , Jean Pihet X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY, URIBL_BLACK autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Introducing perf_regs_load function, which is going to be used for dwarf unwind test in following patches. It takes single argument as a pointer to the regs dump buffer and populates it with current registers values, as expected by the perf built-in unwinding test. Signed-off-by: Jean Pihet Cc: Steve Capper Cc: Corey Ashford Cc: Frederic Weisbecker Cc: Ingo Molnar Cc: Namhyung Kim Cc: Paul Mackerras Cc: Peter Zijlstra Cc: Arnaldo Carvalho de Melo Cc: David Ahern Cc: Jiri Olsa --- tools/perf/arch/arm64/Makefile | 1 + tools/perf/arch/arm64/include/perf_regs.h | 2 ++ tools/perf/arch/arm64/tests/regs_load.S | 39 +++++++++++++++++++++++++++++++ 3 files changed, 42 insertions(+) create mode 100644 tools/perf/arch/arm64/tests/regs_load.S diff --git a/tools/perf/arch/arm64/Makefile b/tools/perf/arch/arm64/Makefile index 67e9b3d..9b8f87e 100644 --- a/tools/perf/arch/arm64/Makefile +++ b/tools/perf/arch/arm64/Makefile @@ -4,4 +4,5 @@ LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o endif ifndef NO_LIBUNWIND LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/unwind-libunwind.o +LIB_OBJS += $(OUTPUT)arch/$(ARCH)/tests/regs_load.o endif diff --git a/tools/perf/arch/arm64/include/perf_regs.h b/tools/perf/arch/arm64/include/perf_regs.h index 2359546..1e052f1 100644 --- a/tools/perf/arch/arm64/include/perf_regs.h +++ b/tools/perf/arch/arm64/include/perf_regs.h @@ -9,6 +9,8 @@ #define PERF_REG_IP PERF_REG_ARM64_PC #define PERF_REG_SP PERF_REG_ARM64_SP +void perf_regs_load(u64 *regs); + static inline const char *perf_reg_name(int id) { switch (id) { diff --git a/tools/perf/arch/arm64/tests/regs_load.S b/tools/perf/arch/arm64/tests/regs_load.S new file mode 100644 index 0000000..92ab968 --- /dev/null +++ b/tools/perf/arch/arm64/tests/regs_load.S @@ -0,0 +1,39 @@ +#include + +/* + * Implementation of void perf_regs_load(u64 *regs); + * + * This functions fills in the 'regs' buffer from the actual registers values, + * in the way the perf built-in unwinding test expects them: + * - the PC at the time at the call to this function. Since this function + * is called using a bl instruction, the PC value is taken from LR, + * - the current SP (not touched by this function), + * - the current value of LR is merely retrieved and stored because the + * value before the call to this function is unknown at this time; it will + * be unwound from the dwarf information in unwind__get_entries. + */ + +.text +.type perf_regs_load,%function +ENTRY(perf_regs_load) + stp x0, x1, [x0], #16 // store x0..x29 + stp x2, x3, [x0], #16 + stp x4, x5, [x0], #16 + stp x6, x7, [x0], #16 + stp x8, x9, [x0], #16 + stp x10, x11, [x0], #16 + stp x12, x13, [x0], #16 + stp x14, x15, [x0], #16 + stp x16, x17, [x0], #16 + stp x18, x19, [x0], #16 + stp x20, x21, [x0], #16 + stp x22, x23, [x0], #16 + stp x24, x25, [x0], #16 + stp x26, x27, [x0], #16 + stp x28, x29, [x0], #16 + mov x1, sp + stp x30, x1, [x0], #16 // store lr and sp + str x30, [x0] // store pc as lr in order to skip the call + // to this function + ret +ENDPROC(perf_regs_load)