From patchwork Tue Apr 1 08:03:45 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 3919271 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 97A3FBF540 for ; Tue, 1 Apr 2014 08:07:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CCCCB203AF for ; Tue, 1 Apr 2014 08:07:02 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E12BF20380 for ; Tue, 1 Apr 2014 08:07:01 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WUth8-0000tV-W0; Tue, 01 Apr 2014 08:05:19 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WUtgs-00027U-7K; Tue, 01 Apr 2014 08:05:02 +0000 Received: from mail-pb0-f49.google.com ([209.85.160.49]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WUtgo-00024f-1w for linux-arm-kernel@lists.infradead.org; Tue, 01 Apr 2014 08:04:59 +0000 Received: by mail-pb0-f49.google.com with SMTP id jt11so9451426pbb.36 for ; Tue, 01 Apr 2014 01:04:36 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=L1P8n7Vkne/t/QpgMZCTnFVnErQpIMnWUs5cD9YpI1E=; b=fyMawGtKxtwmBEWoJPmcDILek8kWqLSNNgT8lQmlKjRnDHT5ZbKihowOOKPxRwrxxW 8SP4ZMvwhES7RtsiEmzFZjUDW2o2k3aN1PbjfpimgxRKX2SzrtxCJjczNMYyk8Y0bCAV NXotcz/bZdwXBsVYhUHGpdQdiTsnSjI+Hi5V9teJZ7ZTc51+SqqhYLYZQPfw321Y7m7e QOE69g1uNQmUkHI1yuzAr38Iz2zh5frMZ7tk7CbkGKLjn4kTxUGtGuZdx9sVcD8/jyCw 78Wrf93ZCS7mlWt+3DcMmjuXUOfQklzpomBWxzXD/8P0XDcCk7xA6ybS7MLaql+wmgdI ITkQ== X-Gm-Message-State: ALoCoQm6nASjQK9hVAk/SRB2HZd8qVzlfihdB0m1PwXLYvCNOn6BjuCzeTNqY9uYXQK0R7quRcyo X-Received: by 10.66.176.143 with SMTP id ci15mr30086985pac.35.1396339476544; Tue, 01 Apr 2014 01:04:36 -0700 (PDT) Received: from localhost.localdomain ([140.206.182.114]) by mx.google.com with ESMTPSA id yo9sm52327508pab.16.2014.04.01.01.04.28 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 01 Apr 2014 01:04:36 -0700 (PDT) From: Haojian Zhuang To: tglx@linutronix.de, linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org, arnd@arndb.de, olof@lixom.net, khilman@kernel.org, xuwei5@hisilicon.com Subject: [PATCH v1 3/8] irq: gic: use mask field in GICC_IAR Date: Tue, 1 Apr 2014 16:03:45 +0800 Message-Id: <1396339430-21084-4-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1396339430-21084-1-git-send-email-haojian.zhuang@linaro.org> References: <1396339430-21084-1-git-send-email-haojian.zhuang@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140401_040458_195997_89574FC8 X-CRM114-Status: GOOD ( 11.52 ) X-Spam-Score: -2.6 (--) Cc: Haojian Zhuang X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Bit[9:0] is interrupt ID field in GICC_IAR. Bit[12:10] is CPU ID field, and others are reserved. So we should use GICC_IAR_INTID to get interrupt ID. It's not a good way to use ~0x1c00 (CPU ID field) to get interrupt ID. Signed-off-by: Haojian Zhuang --- drivers/irqchip/irq-gic.c | 2 +- include/linux/irqchip/arm-gic.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 4300b66..8fd27bf 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -287,7 +287,7 @@ static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) do { irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK); - irqnr = irqstat & ~0x1c00; + irqnr = irqstat & GICC_IAR_INTID; if (likely(irqnr > 15 && irqnr < 1021)) { irqnr = irq_find_mapping(gic->domain, irqnr); diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h index 7ed92d0..55933aa 100644 --- a/include/linux/irqchip/arm-gic.h +++ b/include/linux/irqchip/arm-gic.h @@ -21,6 +21,8 @@ #define GIC_CPU_ACTIVEPRIO 0xd0 #define GIC_CPU_IDENT 0xfc +#define GICC_IAR_INTID 0x3ff + #define GIC_DIST_CTRL 0x000 #define GIC_DIST_CTR 0x004 #define GIC_DIST_IGROUP 0x080