From patchwork Wed Apr 2 10:42:17 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 3928021 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 744DC9F334 for ; Wed, 2 Apr 2014 10:44:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 83D4E2024D for ; Wed, 2 Apr 2014 10:44:43 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 675932022A for ; Wed, 2 Apr 2014 10:44:42 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WVIdq-0007Pz-Sx; Wed, 02 Apr 2014 10:43:35 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WVIde-0007WI-OX; Wed, 02 Apr 2014 10:43:22 +0000 Received: from mail-pa0-f46.google.com ([209.85.220.46]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WVIdY-0007Tm-Qs for linux-arm-kernel@lists.infradead.org; Wed, 02 Apr 2014 10:43:18 +0000 Received: by mail-pa0-f46.google.com with SMTP id kx10so5792519pab.19 for ; Wed, 02 Apr 2014 03:42:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=on7ov61rP1YPL+8nlNSaJwLhtgpvj+Hs89BMwICsGIM=; b=iYybcEUVUVuxSixqv5MdvsGpmuMe9Izpbym7Ys3alI95zPGWwUYzEL03MPyDnvVxWm Sqj73N3lUUeggp51L3KOQwiHMNm2FPijmPZPCaLPAD4qUYn8Z9mBez8O6pJCY4Iu9+jt 2hXhoLVHiGWdm/z0SRM8iOhz+O4A2xDxUs9nX8w/VcxYKF4r4el8LJmD+gvWomAwmFNp Hwq07PVyrIefcUnvOjaV4x2KRk0CiIarE+HdL2KsyQOLzqKB7M5QI8WibQu26r1e1QEu 2m5NPsg3EWFzNZ1PPATSXlt+iAzpgQFwgW7cvw/FvvCG5tkoFFw/4FJmdtOAvyNT4c+V HqUw== X-Gm-Message-State: ALoCoQkJ+Zn7+7ueDIQITk8r5VnhAgXB9tsbXTNTUzWlazPStkmpTgoxUodBV/iqxeUyZqtd+1YY X-Received: by 10.68.194.202 with SMTP id hy10mr37218981pbc.94.1396435375319; Wed, 02 Apr 2014 03:42:55 -0700 (PDT) Received: from pnqlab006.amcc.com ([182.73.239.130]) by mx.google.com with ESMTPSA id tk5sm3573403pbc.63.2014.04.02.03.42.50 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 02 Apr 2014 03:42:54 -0700 (PDT) From: Anup Patel To: kvmarm@lists.cs.columbia.edu Subject: [PATCH v7 02/12] ARM/ARM64: KVM: Add common header for PSCI related defines Date: Wed, 2 Apr 2014 16:12:17 +0530 Message-Id: <1396435347-20056-3-git-send-email-anup.patel@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1396435347-20056-1-git-send-email-anup.patel@linaro.org> References: <1396435347-20056-1-git-send-email-anup.patel@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140402_064316_975669_13894C73 X-CRM114-Status: GOOD ( 11.59 ) X-Spam-Score: -2.6 (--) Cc: Mark Rutland , Rob Herring , linaro-kernel@lists.linaro.org, Anup Patel , Marc Zyngier , patches@apm.com, Ashwin Chaugule , linux-arm-kernel@lists.infradead.org, Christoffer Dall , Pranavkumar Sawargaonkar X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We need a common place to share PSCI related defines among ARM kernel, ARM64 kernel, KVM ARM/ARM64 PSCI emulation, and user space. We introduce uapi/linux/psci.h for this purpose. This newly added header will be first used by KVM ARM/ARM64 in-kernel PSCI emulation and user space (i.e. QEMU or KVMTOOL). Signed-off-by: Anup Patel Signed-off-by: Pranavkumar Sawargaonkar Acked-by: Ashwin Chaugule Signed-off-by: Ashwin Chaugule Signed-off-by: Ashwin Chaugule --- include/uapi/linux/Kbuild | 1 + include/uapi/linux/psci.h | 73 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 74 insertions(+) create mode 100644 include/uapi/linux/psci.h diff --git a/include/uapi/linux/Kbuild b/include/uapi/linux/Kbuild index 6929571..24e9033 100644 --- a/include/uapi/linux/Kbuild +++ b/include/uapi/linux/Kbuild @@ -317,6 +317,7 @@ header-y += ppp-ioctl.h header-y += ppp_defs.h header-y += pps.h header-y += prctl.h +header-y += psci.h header-y += ptp_clock.h header-y += ptrace.h header-y += qnx4_fs.h diff --git a/include/uapi/linux/psci.h b/include/uapi/linux/psci.h new file mode 100644 index 0000000..fbf8a81 --- /dev/null +++ b/include/uapi/linux/psci.h @@ -0,0 +1,73 @@ +/* + * ARM Power State and Coordination Interface (PSCI) header + * + * This header holds common PSCI defines and macros shared + * by: ARM kernel, ARM64 kernel, KVM ARM/ARM64 and user space. + * + * Copyright (C) 2014 Linaro Ltd. + * Author: Anup Patel + */ + +#ifndef _UAPI_LINUX_PSCI_H +#define _UAPI_LINUX_PSCI_H + +/* PSCI v0.1 interface */ +#define PSCI_FN(base, n) ((base) + (n)) + +#define PSCI_FN_CPU_SUSPEND(base) PSCI_FN(base, 0) +#define PSCI_FN_CPU_OFF(base) PSCI_FN(base, 1) +#define PSCI_FN_CPU_ON(base) PSCI_FN(base, 2) +#define PSCI_FN_MIGRATE(base) PSCI_FN(base, 3) + +/* PSCI v0.2 interface */ +#define PSCI_0_2_FN_BASE 0x84000000 +#define PSCI_0_2_FN(n) (PSCI_0_2_FN_BASE + (n)) +#define PSCI_0_2_64BIT 0x40000000 +#define PSCI_0_2_FN64_BASE \ + (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT) +#define PSCI_0_2_FN64(n) (PSCI_0_2_FN64_BASE + (n)) + +#define PSCI_0_2_FN_PSCI_VERSION PSCI_0_2_FN(0) +#define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1) +#define PSCI_0_2_FN_CPU_OFF PSCI_0_2_FN(2) +#define PSCI_0_2_FN_CPU_ON PSCI_0_2_FN(3) +#define PSCI_0_2_FN_AFFINITY_INFO PSCI_0_2_FN(4) +#define PSCI_0_2_FN_MIGRATE PSCI_0_2_FN(5) +#define PSCI_0_2_FN_MIGRATE_INFO_TYPE PSCI_0_2_FN(6) +#define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU PSCI_0_2_FN(7) +#define PSCI_0_2_FN_SYSTEM_OFF PSCI_0_2_FN(8) +#define PSCI_0_2_FN_SYSTEM_RESET PSCI_0_2_FN(9) + +#define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1) +#define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3) +#define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4) +#define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5) +#define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7) + +#define PSCI_0_2_POWER_STATE_ID_MASK 0xffff +#define PSCI_0_2_POWER_STATE_ID_SHIFT 0 +#define PSCI_0_2_POWER_STATE_TYPE_MASK 0x1 +#define PSCI_0_2_POWER_STATE_TYPE_SHIFT 16 +#define PSCI_0_2_POWER_STATE_AFFL_MASK 0x3 +#define PSCI_0_2_POWER_STATE_AFFL_SHIFT 24 + +/* PSCI version decoding (independent of PSCI version) */ +#define PSCI_VERSION_MAJOR_MASK 0xffff0000 +#define PSCI_VERSION_MINOR_MASK 0x0000ffff +#define PSCI_VERSION_MAJOR_SHIFT 16 +#define PSCI_VERSION_MAJOR(ver) \ + (((ver) & PSCI_VER_MAJOR_MASK) >> PSCI_VER_MAJOR_SHIFT) +#define PSCI_VERSION_MINOR(ver) ((ver) & PSCI_VER_MINOR_MASK) + +/* PSCI return values (inclusive of all PSCI versions) */ +#define PSCI_RET_SUCCESS 0 +#define PSCI_RET_NOT_SUPPORTED -1 +#define PSCI_RET_INVALID_PARAMS -2 +#define PSCI_RET_DENIED -3 +#define PSCI_RET_ALREADY_ON -4 +#define PSCI_RET_ON_PENDING -5 +#define PSCI_RET_INTERNAL_FAILURE -6 +#define PSCI_RET_NOT_PRESENT -7 +#define PSCI_RET_DISABLED -8 + +#endif /* _UAPI_LINUX_PSCI_H */