From patchwork Fri Apr 4 23:14:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Soren Brinkmann X-Patchwork-Id: 3941481 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6A915BFF02 for ; Fri, 4 Apr 2014 23:17:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 77AE420274 for ; Fri, 4 Apr 2014 23:17:41 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5C5D320265 for ; Fri, 4 Apr 2014 23:17:40 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WWDL3-0005jo-6p; Fri, 04 Apr 2014 23:15:58 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WWDKl-0001qX-Fv; Fri, 04 Apr 2014 23:15:39 +0000 Received: from mail-qc0-f178.google.com ([209.85.216.178]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WWDKP-0001km-Dg for linux-arm-kernel@lists.infradead.org; Fri, 04 Apr 2014 23:15:19 +0000 Received: by mail-qc0-f178.google.com with SMTP id i8so4177980qcq.37 for ; Fri, 04 Apr 2014 16:14:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=lKt83GAET97PJSCFOoM8UCsEmWFzBGWidrmBWYesGBA=; b=hdSAUkSRDatfsOArJbfIEWIy+Qh+4vMdSmuqR/cr9v20j8XNqdzBg+t5B4nFTAQaRI nQw5fhBgrZRt3q4WL39y/EH8sIc6HfPWRyYknvCEv397G/Zh9fq98RYSaNqUCQdkWTpu IGmu8lW4QdB2hCuBghH6iSCHjfbg8i0TYktAEF+R7Zn85WiMeZjG/FSCPAiscNhqpNHS d0scU4VVtTVxboDHE+5oKSWKuEuTwfVqhWrAv+7ADePzBAEQ2TRGgdslINdbttsh0//V 7dEYcjTglVwEjsXHT/lHDD5+r8ePuTUMRkoqGXL+KAwJMG6i1a3B5QUiP5zrrlJ0T72P KPIA== X-Received: by 10.224.63.197 with SMTP id c5mr17650584qai.39.1396653293318; Fri, 04 Apr 2014 16:14:53 -0700 (PDT) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPSA id c5sm12970387qge.21.2014.04.04.16.14.51 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 04 Apr 2014 16:14:52 -0700 (PDT) From: Soren Brinkmann To: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Michal Simek Subject: [PATCH v2 5/5] ARM: zynq: dt: Use #defines for clock specifiers Date: Fri, 4 Apr 2014 16:14:16 -0700 Message-Id: <1396653256-28397-6-git-send-email-soren.brinkmann@xilinx.com> X-Mailer: git-send-email 1.9.1.1.gbb9f595 In-Reply-To: <1396653256-28397-1-git-send-email-soren.brinkmann@xilinx.com> References: <1396653256-28397-1-git-send-email-soren.brinkmann@xilinx.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140404_191517_540681_46605C95 X-CRM114-Status: GOOD ( 11.10 ) X-Spam-Score: -2.6 (--) Cc: devicetree@vger.kernel.org, Mike Looijmans , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Steffen Trumtrar , =?UTF-8?q?S=C3=B6ren=20Brinkmann?= X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Use symbolic names instead of bare numbers to specify clocks. Signed-off-by: Soren Brinkmann --- Changes in v2: - this patch has been added --- arch/arm/boot/dts/zynq-7000.dtsi | 33 +++++++++++++++++++++------------ 1 file changed, 21 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 36a34ffa30af..9a54b49d0fd2 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -13,6 +13,7 @@ #include "skeleton.dtsi" #include +#include / { compatible = "xlnx,zynq-7000"; @@ -25,8 +26,8 @@ compatible = "arm,cortex-a9"; device_type = "cpu"; reg = <0>; - clocks = <&clkc 3>; clock-latency = <1000>; + clocks = <&clkc ZYNQ_CLK_CPU_6OR4X>; operating-points = < /* kHz uV */ 666667 1000000 @@ -39,7 +40,7 @@ compatible = "arm,cortex-a9"; device_type = "cpu"; reg = <1>; - clocks = <&clkc 3>; + clocks = <&clkc ZYNQ_CLK_CPU_6OR4X>; }; }; @@ -78,7 +79,8 @@ uart0: uart@e0000000 { compatible = "xlnx,xuartps"; status = "disabled"; - clocks = <&clkc 23>, <&clkc 40>; + clocks = <&clkc ZYNQ_CLK_UART0>, + <&clkc ZYNQ_CLK_UART0_APER>; clock-names = "ref_clk", "aper_clk"; reg = <0xE0000000 0x1000>; interrupts = ; @@ -87,7 +89,8 @@ uart1: uart@e0001000 { compatible = "xlnx,xuartps"; status = "disabled"; - clocks = <&clkc 24>, <&clkc 41>; + clocks = <&clkc ZYNQ_CLK_UART1>, + <&clkc ZYNQ_CLK_UART1_APER>; clock-names = "ref_clk", "aper_clk"; reg = <0xE0001000 0x1000>; interrupts = ; @@ -98,7 +101,9 @@ reg = <0xe000b000 0x4000>; status = "disabled"; interrupts = ; - clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>; + clocks = <&clkc ZYNQ_CLK_GEM0_APER>, + <&clkc ZYNQ_CLK_GEM0_APER>, + <&clkc ZYNQ_CLK_GEM0>; clock-names = "pclk", "hclk", "tx_clk"; }; @@ -107,7 +112,9 @@ reg = <0xe000c000 0x4000>; status = "disabled"; interrupts = ; - clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>; + clocks = <&clkc ZYNQ_CLK_GEM1_APER>, + <&clkc ZYNQ_CLK_GEM1_APER>, + <&clkc ZYNQ_CLK_GEM1>; clock-names = "pclk", "hclk", "tx_clk"; }; @@ -115,7 +122,8 @@ compatible = "arasan,sdhci-8.9a"; status = "disabled"; clock-names = "clk_xin", "clk_ahb"; - clocks = <&clkc 21>, <&clkc 32>; + clocks = <&clkc ZYNQ_CLK_SDIO0>, + <&clkc ZYNQ_CLK_SDIO0_APER>; interrupt-parent = <&intc>; interrupts = ; reg = <0xe0100000 0x1000>; @@ -125,7 +133,8 @@ compatible = "arasan,sdhci-8.9a"; status = "disabled"; clock-names = "clk_xin", "clk_ahb"; - clocks = <&clkc 22>, <&clkc 33>; + clocks = <&clkc ZYNQ_CLK_SDIO1>, + <&clkc ZYNQ_CLK_SDIO1_APER>; interrupt-parent = <&intc>; interrupts = ; reg = <0xe0101000 0x1000>; @@ -163,7 +172,7 @@ reg = <0xf8f00200 0x20>; interrupts = ; interrupt-parent = <&intc>; - clocks = <&clkc 4>; + clocks = <&clkc ZYNQ_CLK_CPU_3OR2X>; }; ttc0: ttc0@f8001000 { @@ -172,7 +181,7 @@ , ; compatible = "cdns,ttc"; - clocks = <&clkc 6>; + clocks = <&clkc ZYNQ_CLK_CPU_1X>; reg = <0xF8001000 0x1000>; }; @@ -182,7 +191,7 @@ , ; compatible = "cdns,ttc"; - clocks = <&clkc 6>; + clocks = <&clkc ZYNQ_CLK_CPU_1X>; reg = <0xF8002000 0x1000>; }; scutimer: scutimer@f8f00600 { @@ -190,7 +199,7 @@ interrupts = ; compatible = "arm,cortex-a9-twd-timer"; reg = < 0xf8f00600 0x20 >; - clocks = <&clkc 4>; + clocks = <&clkc ZYNQ_CLK_CPU_3OR2X>; } ; }; };