From patchwork Sat Apr 5 00:23:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Soren Brinkmann X-Patchwork-Id: 3941621 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4850F9F1EE for ; Sat, 5 Apr 2014 00:26:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5966520381 for ; Sat, 5 Apr 2014 00:26:58 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3D49520225 for ; Sat, 5 Apr 2014 00:26:57 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WWEQQ-00070y-He; Sat, 05 Apr 2014 00:25:35 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WWEQ7-0002vn-Bi; Sat, 05 Apr 2014 00:25:15 +0000 Received: from mail-qg0-x235.google.com ([2607:f8b0:400d:c04::235]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WWEPP-0002n7-SE for linux-arm-kernel@lists.infradead.org; Sat, 05 Apr 2014 00:24:45 +0000 Received: by mail-qg0-f53.google.com with SMTP id z60so2795790qgd.40 for ; Fri, 04 Apr 2014 17:24:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=KMAqkx3fbT0OZs00eSqdE3oXBdtIqnN/g6ef/0REvkA=; b=N/qONv69xgNpM8RU9fDRvpvXD8ROqXJs20C42gkizWiSVY/gPj/CQcqmLyNDEKVjlt be/1jWOnQeB60C8FO3raHlinCUNEbpm9vf7bTpGR4haZIIdgKiymW0ZvKxEpGgN2eIqC zYg5LrzV7eDcwlxfzTJBn2vsxsWbIIBRy8CFWn9n72PbC7Mrcq9UL9Pqeg9t1CEMywvr N72SfJSLMAKmb1/0oHVOhic9zcturawE+2X3MO+C7n//V1yXa7tiNIxu7QzjrGlJkWDp Jw/547GuFipgl/npWJJiZV9R2aeuONU9loCovelFDvJMv7BeG9fXwyfC5Fc03TB7qhgd rmbg== X-Received: by 10.140.29.6 with SMTP id a6mr17074460qga.57.1396657450625; Fri, 04 Apr 2014 17:24:10 -0700 (PDT) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPSA id w67sm13160943qge.12.2014.04.04.17.24.09 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 04 Apr 2014 17:24:09 -0700 (PDT) From: Soren Brinkmann To: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Randy Dunlap , Russell King , Michal Simek , Greg Kroah-Hartman , Jiri Slaby , Grant Likely Subject: [RESEND PATCH v3 5/9] tty: xuartps: Refactor read-modify-writes Date: Fri, 4 Apr 2014 17:23:41 -0700 Message-Id: <1396657425-31029-5-git-send-email-soren.brinkmann@xilinx.com> X-Mailer: git-send-email 1.9.1.1.gbb9f595 In-Reply-To: <1396657425-31029-1-git-send-email-soren.brinkmann@xilinx.com> References: <1396657425-31029-1-git-send-email-soren.brinkmann@xilinx.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140404_202432_245331_E9FDF3D1 X-CRM114-Status: GOOD ( 11.75 ) X-Spam-Score: -1.9 (-) Cc: One Thousand Gnomes , Peter Crosthwaite , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-serial@vger.kernel.org, Soren Brinkmann X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP A lot of read-modify-write sequences used a one-line statement which nests a readl() within a writel(). Convert this into code sequences that make the three steps more obvious. Signed-off-by: Soren Brinkmann Tested-by: Michal Simek --- Changes in v3: None Changes in v2: None drivers/tty/serial/xilinx_uartps.c | 52 ++++++++++++++++++-------------------- 1 file changed, 24 insertions(+), 28 deletions(-) diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c index 814391038abb..b182ab8cfd07 100644 --- a/drivers/tty/serial/xilinx_uartps.c +++ b/drivers/tty/serial/xilinx_uartps.c @@ -437,9 +437,9 @@ static int xuartps_clk_notifier_cb(struct notifier_block *nb, spin_lock_irqsave(&xuartps->port->lock, flags); /* Disable the TX and RX to set baud rate */ - xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) | - (XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS), - XUARTPS_CR_OFFSET); + ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); + ctrl_reg |= XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS; + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); spin_unlock_irqrestore(&xuartps->port->lock, flags); @@ -464,9 +464,9 @@ static int xuartps_clk_notifier_cb(struct notifier_block *nb, spin_lock_irqsave(&xuartps->port->lock, flags); /* Set TX/RX Reset */ - xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) | - (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST), - XUARTPS_CR_OFFSET); + ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); + ctrl_reg |= XUARTPS_CR_TXRST | XUARTPS_CR_RXRST; + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); while (xuartps_readl(XUARTPS_CR_OFFSET) & (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST)) @@ -479,10 +479,9 @@ static int xuartps_clk_notifier_cb(struct notifier_block *nb, */ xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET); ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); - xuartps_writel( - (ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) | - (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN), - XUARTPS_CR_OFFSET); + ctrl_reg &= ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS); + ctrl_reg |= XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN; + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); spin_unlock_irqrestore(&xuartps->port->lock, flags); @@ -631,9 +630,9 @@ static void xuartps_set_termios(struct uart_port *port, } /* Disable the TX and RX to set baud rate */ - xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) | - (XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS), - XUARTPS_CR_OFFSET); + ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); + ctrl_reg |= XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS; + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); /* * Min baud rate = 6bps and Max Baud Rate is 10Mbps for 100Mhz clk @@ -651,20 +650,18 @@ static void xuartps_set_termios(struct uart_port *port, uart_update_timeout(port, termios->c_cflag, baud); /* Set TX/RX Reset */ - xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) | - (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST), - XUARTPS_CR_OFFSET); - ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); + ctrl_reg |= XUARTPS_CR_TXRST | XUARTPS_CR_RXRST; + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); /* * Clear the RX disable and TX disable bits and then set the TX enable * bit and RX enable bit to enable the transmitter and receiver. */ - xuartps_writel( - (ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) - | (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN), - XUARTPS_CR_OFFSET); + ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); + ctrl_reg &= ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS); + ctrl_reg |= XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN; + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET); @@ -1248,9 +1245,9 @@ static int xuartps_resume(struct device *device) spin_lock_irqsave(&port->lock, flags); /* Set TX/RX Reset */ - xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) | - (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST), - XUARTPS_CR_OFFSET); + ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); + ctrl_reg |= XUARTPS_CR_TXRST | XUARTPS_CR_RXRST; + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); while (xuartps_readl(XUARTPS_CR_OFFSET) & (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST)) cpu_relax(); @@ -1259,10 +1256,9 @@ static int xuartps_resume(struct device *device) xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET); /* Enable Tx/Rx */ ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); - xuartps_writel( - (ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) | - (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN), - XUARTPS_CR_OFFSET); + ctrl_reg &= ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS); + ctrl_reg |= XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN; + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); spin_unlock_irqrestore(&port->lock, flags); } else {