From patchwork Mon Apr 7 16:03:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Denis Carikli X-Patchwork-Id: 3946291 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7BEBDBFF02 for ; Mon, 7 Apr 2014 16:04:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 89CEE20225 for ; Mon, 7 Apr 2014 16:04:54 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0E4F320221 for ; Mon, 7 Apr 2014 16:04:53 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WXC2O-0003cv-36; Mon, 07 Apr 2014 16:04:44 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WXC2L-0003AB-Hw; Mon, 07 Apr 2014 16:04:41 +0000 Received: from smtp1-g21.free.fr ([2a01:e0c:1:1599::10]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WXC2H-00039W-E5 for linux-arm-kernel@lists.infradead.org; Mon, 07 Apr 2014 16:04:39 +0000 Received: from denis-N73SV.local.eukrea.fr (unknown [88.170.243.169]) by smtp1-g21.free.fr (Postfix) with ESMTP id 353F09400C8; Mon, 7 Apr 2014 18:04:05 +0200 (CEST) From: Denis Carikli To: Subject: [PATCH v2][ 1/3] chipidea: usbmisc_imx: Allow USB OTG to work on mx51 Date: Mon, 7 Apr 2014 18:03:59 +0200 Message-Id: <1396886641-26985-1-git-send-email-denis@eukrea.com> X-Mailer: git-send-email 1.7.9.5 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140407_120438_355308_0B61E06E X-CRM114-Status: GOOD ( 12.16 ) X-Spam-Score: -1.2 (-) Cc: Fabio Estevam , =?UTF-8?q?Eric=20B=C3=A9nard?= , Sascha Hauer , Shawn Guo , Fabio Estevam , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Fabio Estevam The field PLLDIVVALUE of register PHY_CTRL_1 selects the reference clock source for the PHY: 00 = sysclock uses 19.2 MHz 01 = sysclock uses 24 MHz 10 = sysclock uses 26 MHz 11 = sysclock uses 27 MHz The reset value for this field is 10 according to the reference manual, and even though this reset value works for mx53, it does not work for mx51. So instead of relying on the reset value for the PLLDIVVALUE field, explicitly set it to 01 so that a 24MHz clock can be selected for the PHY and allowing both mx51 and mx53 to have USB OTG port functional. Succesfully tested 'g_ether' on a imx51-babbage and on a imx53-qsb boards. Signed-off-by: Fabio Estevam --- drivers/usb/chipidea/usbmisc_imx.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/usb/chipidea/usbmisc_imx.c b/drivers/usb/chipidea/usbmisc_imx.c index cd061ab..f6c4f3c 100644 --- a/drivers/usb/chipidea/usbmisc_imx.c +++ b/drivers/usb/chipidea/usbmisc_imx.c @@ -26,11 +26,14 @@ #define MX27_OTG_PM_BIT BIT(24) #define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08 +#define MX53_USB_OTG_PHY_CTRL_1_OFFSET 0x0c #define MX53_USB_UH2_CTRL_OFFSET 0x14 #define MX53_USB_UH3_CTRL_OFFSET 0x18 #define MX53_BM_OVER_CUR_DIS_H1 BIT(5) #define MX53_BM_OVER_CUR_DIS_OTG BIT(8) #define MX53_BM_OVER_CUR_DIS_UHx BIT(30) +#define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3 +#define MX53_USB_PLL_DIV_24_MHZ 0x01 #define MX6_BM_OVER_CUR_DIS BIT(7) @@ -111,6 +114,13 @@ static int usbmisc_imx53_init(struct imx_usbmisc_data *data) if (data->index > 3) return -EINVAL; + /* Select a 24 MHz reference clock for the PHY */ + reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET; + val = readl(reg); + val &= ~MX53_USB_PHYCTRL1_PLLDIV_MASK; + val |= MX53_USB_PLL_DIV_24_MHZ; + writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET); + if (data->disable_oc) { spin_lock_irqsave(&usbmisc->lock, flags); switch (data->index) {