From patchwork Thu Apr 10 12:25:44 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris BREZILLON X-Patchwork-Id: 3964061 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 41F4B9F3D5 for ; Thu, 10 Apr 2014 18:24:34 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7004620824 for ; Thu, 10 Apr 2014 18:24:33 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6CDF02081D for ; Thu, 10 Apr 2014 18:24:32 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WYJeG-0006ZX-Ls; Thu, 10 Apr 2014 18:24:28 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WYJe8-0001bi-Ho; Thu, 10 Apr 2014 18:24:26 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WYJe0-0001bb-88 for linux-arm-kernel@merlin.infradead.org; Thu, 10 Apr 2014 18:24:12 +0000 Received: from top.free-electrons.com ([176.31.233.9] helo=mail.free-electrons.com) by casper.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WYE3f-0002C5-GF for linux-arm-kernel@lists.infradead.org; Thu, 10 Apr 2014 12:26:21 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id 2C75883C; Thu, 10 Apr 2014 14:25:57 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost.localdomain (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id 4FEFE808; Thu, 10 Apr 2014 14:25:56 +0200 (CEST) From: Boris BREZILLON To: Randy Dunlap , Maxime Ripard , =?UTF-8?q?Emilio=20L=C3=B3pez?= , Mike Turquette , Linus Walleij , Chen-Yu Tsai , Hans de Goede Subject: [PATCH v2 2/5] pinctrl: sunxi: support multiple pin controller Date: Thu, 10 Apr 2014 14:25:44 +0200 Message-Id: <1397132747-13917-3-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1397132747-13917-1-git-send-email-boris.brezillon@free-electrons.com> References: <1397132747-13917-1-git-send-email-boris.brezillon@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140410_132619_625657_0B341E96 X-CRM114-Status: GOOD ( 14.73 ) X-Spam-Score: -1.5 (-) Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org, dev@linux-sunxi.org, Boris BREZILLON , linux-kernel@vger.kernel.org, Shuge , kevin@allwinnertech.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for multiple pin controller instances. First remove the static definition of the sunxi gpio chip struct and fill the dynamically struct instead. Then define a new pin_base field in the sunxi_pinctrl_desc which will be used to specify the gpiochip base pin. Signed-off-by: Boris BREZILLON Acked-by: Maxime Ripard --- drivers/pinctrl/pinctrl-sunxi.c | 30 ++++++++++++++---------------- drivers/pinctrl/pinctrl-sunxi.h | 1 + 2 files changed, 15 insertions(+), 16 deletions(-) diff --git a/drivers/pinctrl/pinctrl-sunxi.c b/drivers/pinctrl/pinctrl-sunxi.c index f9fabe9..64bcc68 100644 --- a/drivers/pinctrl/pinctrl-sunxi.c +++ b/drivers/pinctrl/pinctrl-sunxi.c @@ -538,19 +538,6 @@ static int sunxi_pinctrl_gpio_to_irq(struct gpio_chip *chip, unsigned offset) return irq_find_mapping(pctl->domain, desc->irqnum); } -static struct gpio_chip sunxi_pinctrl_gpio_chip = { - .owner = THIS_MODULE, - .request = sunxi_pinctrl_gpio_request, - .free = sunxi_pinctrl_gpio_free, - .direction_input = sunxi_pinctrl_gpio_direction_input, - .direction_output = sunxi_pinctrl_gpio_direction_output, - .get = sunxi_pinctrl_gpio_get, - .set = sunxi_pinctrl_gpio_set, - .of_xlate = sunxi_pinctrl_gpio_of_xlate, - .to_irq = sunxi_pinctrl_gpio_to_irq, - .of_gpio_n_cells = 3, - .can_sleep = false, -}; static int sunxi_pinctrl_irq_set_type(struct irq_data *d, unsigned int type) @@ -858,11 +845,22 @@ static int sunxi_pinctrl_probe(struct platform_device *pdev) } last_pin = pctl->desc->pins[pctl->desc->npins - 1].pin.number; - pctl->chip = &sunxi_pinctrl_gpio_chip; - pctl->chip->ngpio = round_up(last_pin, PINS_PER_BANK); + pctl->chip->owner = THIS_MODULE; + pctl->chip->request = sunxi_pinctrl_gpio_request, + pctl->chip->free = sunxi_pinctrl_gpio_free, + pctl->chip->direction_input = sunxi_pinctrl_gpio_direction_input, + pctl->chip->direction_output = sunxi_pinctrl_gpio_direction_output, + pctl->chip->get = sunxi_pinctrl_gpio_get, + pctl->chip->set = sunxi_pinctrl_gpio_set, + pctl->chip->of_xlate = sunxi_pinctrl_gpio_of_xlate, + pctl->chip->to_irq = sunxi_pinctrl_gpio_to_irq, + pctl->chip->of_gpio_n_cells = 3, + pctl->chip->can_sleep = false, + pctl->chip->ngpio = round_up(last_pin, PINS_PER_BANK) - + pctl->desc->pin_base; pctl->chip->label = dev_name(&pdev->dev); pctl->chip->dev = &pdev->dev; - pctl->chip->base = 0; + pctl->chip->base = pctl->desc->pin_base; ret = gpiochip_add(pctl->chip); if (ret) diff --git a/drivers/pinctrl/pinctrl-sunxi.h b/drivers/pinctrl/pinctrl-sunxi.h index ed3c4d7..35d15b2 100644 --- a/drivers/pinctrl/pinctrl-sunxi.h +++ b/drivers/pinctrl/pinctrl-sunxi.h @@ -450,6 +450,7 @@ struct sunxi_pinctrl_desc { int npins; struct pinctrl_gpio_range *ranges; int nranges; + unsigned pin_base; }; struct sunxi_pinctrl_function {