From patchwork Fri Apr 11 09:38:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Carlo Caione X-Patchwork-Id: 3967021 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9BBC9BFF02 for ; Fri, 11 Apr 2014 09:41:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 866E620804 for ; Fri, 11 Apr 2014 09:41:26 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 28DC5207FE for ; Fri, 11 Apr 2014 09:41:25 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WYXuq-00019X-SB; Fri, 11 Apr 2014 09:38:33 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WYXuE-0008U5-Tn; Fri, 11 Apr 2014 09:37:54 +0000 Received: from bombadil.infradead.org ([2001:1868:205::9]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WYXtM-0008QH-GM for linux-arm-kernel@merlin.infradead.org; Fri, 11 Apr 2014 09:37:00 +0000 Received: from mail-ee0-f51.google.com ([74.125.83.51]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WYXtJ-0001Cx-29 for linux-arm-kernel@lists.infradead.org; Fri, 11 Apr 2014 09:36:58 +0000 Received: by mail-ee0-f51.google.com with SMTP id c13so3961441eek.10 for ; Fri, 11 Apr 2014 02:36:34 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=M/eb0sRTgZulUvzjZyslpUhyHRJixnewIQGgAuGcLE8=; b=L/y1yAcCTsyUze7YEE/zdAQ+1A0L73FQmdGupnh6EtQCffzhX7bUh9RGJYhk4SBYlF xCI6VolwguMe73jLEUb8+/Y4SRJwD8FLLXn0/v8xCr9twehJGUfmrC3jNHbk4KLjHVzg t8bjV2Q70f9sqsO31lZE94QgvPaXq16Al+0ZJSjSqs2oaJs9IgKif6jv40Y3suXFuBaq mZv12+n3+YBN+w1Qvm+A8fe3YL1luSBwThw4KKUziLVcKMDA9wlCHBnXdxhGtclzNMGe AA2M38AKvd07a5w+T8qYA+xHvNSr+c9JdSxVwZHtLt0wCd7AZgyBHg8+lSLrr/mwPT+n 15cQ== X-Received: by 10.15.51.141 with SMTP id n13mr27887814eew.17.1397208993894; Fri, 11 Apr 2014 02:36:33 -0700 (PDT) Received: from localhost-002.homenet.telecomitalia.it (host43-8-static.10-188-b.business.telecomitalia.it. [188.10.8.43]) by mx.google.com with ESMTPSA id l42sm16344939eew.19.2014.04.11.02.36.31 for (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128/128); Fri, 11 Apr 2014 02:36:33 -0700 (PDT) From: Carlo Caione To: linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, maxime.ripard@free-electrons.com, hdegoede@redhat.com, emilio@elopez.com.ar, wens@csie.org, sameo@linux.intel.com, dmitry.torokhov@gmail.com, linux-input@vger.kernel.org, linux-doc@vger.kernel.org, lgirdwood@gmail.com, broonie@kernel.org, lee.jones@linaro.org, boris.brezillon@free-electrons.com Subject: [PATCH v4 6/9] regulator: AXP20x: Add support for regulators subsystem Date: Fri, 11 Apr 2014 11:38:10 +0200 Message-Id: <1397209093-10077-7-git-send-email-carlo@caione.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1397209093-10077-1-git-send-email-carlo@caione.org> References: <1397209093-10077-1-git-send-email-carlo@caione.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140411_023657_404325_31E9D8D5 X-CRM114-Status: GOOD ( 22.10 ) X-Spam-Score: -0.7 (/) Cc: Carlo Caione X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP AXP202 and AXP209 come with two synchronous step-down DC-DCs and five LDOs. This patch introduces basic support for those regulators. Signed-off-by: Carlo Caione --- drivers/regulator/Kconfig | 7 + drivers/regulator/Makefile | 1 + drivers/regulator/axp20x-regulator.c | 285 +++++++++++++++++++++++++++++++++++ 3 files changed, 293 insertions(+) create mode 100644 drivers/regulator/axp20x-regulator.c diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 6a79328..9f3bc48 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -139,6 +139,13 @@ config REGULATOR_AS3722 AS3722 PMIC. This will enable support for all the software controllable DCDC/LDO regulators. +config REGULATOR_AXP20X + tristate "X-POWERS AXP20X PMIC Regulators" + depends on MFD_AXP20X + help + This driver provides support for the voltage regulators on the + AXP20X PMIC. + config REGULATOR_DA903X tristate "Dialog Semiconductor DA9030/DA9034 regulators" depends on PMIC_DA903X diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 979f9dd..1dd084a 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -20,6 +20,7 @@ obj-$(CONFIG_REGULATOR_ANATOP) += anatop-regulator.o obj-$(CONFIG_REGULATOR_ARIZONA) += arizona-micsupp.o arizona-ldo1.o obj-$(CONFIG_REGULATOR_AS3711) += as3711-regulator.o obj-$(CONFIG_REGULATOR_AS3722) += as3722-regulator.o +obj-$(CONFIG_REGULATOR_AXP20X) += axp20x-regulator.o obj-$(CONFIG_REGULATOR_DA903X) += da903x.o obj-$(CONFIG_REGULATOR_DA9052) += da9052-regulator.o obj-$(CONFIG_REGULATOR_DA9055) += da9055-regulator.o diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20x-regulator.c new file mode 100644 index 0000000..78a29e6 --- /dev/null +++ b/drivers/regulator/axp20x-regulator.c @@ -0,0 +1,285 @@ +/* + * AXP20x regulators driver. + * + * Copyright (C) 2013 Carlo Caione + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file "COPYING" in the main directory of this + * archive for more details. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define AXP20X_IO_ENABLED 0x03 +#define AXP20X_IO_DISABLED 0x07 + +#define AXP20X_WORKMODE_DCDC2_MASK BIT(2) +#define AXP20X_WORKMODE_DCDC3_MASK BIT(1) + +#define AXP20X_FREQ_DCDC_MASK 0x0f + +#define AXP20X_DESC_IO(_id, _supply, _min, _max, _step, _vreg, _vmask, _ereg, \ + _emask, _enable_val, _disable_val) \ + [AXP20X_##_id] = { \ + .name = #_id, \ + .supply_name = (_supply), \ + .type = REGULATOR_VOLTAGE, \ + .id = AXP20X_##_id, \ + .n_voltages = (((_max) - (_min)) / (_step) + 1), \ + .owner = THIS_MODULE, \ + .min_uV = (_min) * 1000, \ + .uV_step = (_step) * 1000, \ + .vsel_reg = (_vreg), \ + .vsel_mask = (_vmask), \ + .enable_reg = (_ereg), \ + .enable_mask = (_emask), \ + .enable_val = (_enable_val), \ + .disable_val = (_disable_val), \ + .ops = &axp20x_ops, \ + } + +#define AXP20X_DESC(_id, _supply, _min, _max, _step, _vreg, _vmask, _ereg, \ + _emask) \ + [AXP20X_##_id] = { \ + .name = #_id, \ + .supply_name = (_supply), \ + .type = REGULATOR_VOLTAGE, \ + .id = AXP20X_##_id, \ + .n_voltages = (((_max) - (_min)) / (_step) + 1), \ + .owner = THIS_MODULE, \ + .min_uV = (_min) * 1000, \ + .uV_step = (_step) * 1000, \ + .vsel_reg = (_vreg), \ + .vsel_mask = (_vmask), \ + .enable_reg = (_ereg), \ + .enable_mask = (_emask), \ + .ops = &axp20x_ops, \ + } + +#define AXP20X_DESC_FIXED(_id, _supply, _volt) \ + [AXP20X_##_id] = { \ + .name = #_id, \ + .supply_name = (_supply), \ + .type = REGULATOR_VOLTAGE, \ + .id = AXP20X_##_id, \ + .n_voltages = 1, \ + .owner = THIS_MODULE, \ + .min_uV = (_volt) * 1000, \ + .ops = &axp20x_ops_fixed \ + } + +#define AXP20X_DESC_TABLE(_id, _supply, _table, _vreg, _vmask, _ereg, _emask) \ + [AXP20X_##_id] = { \ + .name = #_id, \ + .supply_name = (_supply), \ + .type = REGULATOR_VOLTAGE, \ + .id = AXP20X_##_id, \ + .n_voltages = ARRAY_SIZE(_table), \ + .owner = THIS_MODULE, \ + .vsel_reg = (_vreg), \ + .vsel_mask = (_vmask), \ + .enable_reg = (_ereg), \ + .enable_mask = (_emask), \ + .volt_table = (_table), \ + .ops = &axp20x_ops_table, \ + } + +static const int axp20x_ldo4_data[] = { 1250000, 1300000, 1400000, 1500000, 1600000, + 1700000, 1800000, 1900000, 2000000, 2500000, + 2700000, 2800000, 3000000, 3100000, 3200000, + 3300000 }; + +static struct regulator_ops axp20x_ops_fixed = { + .list_voltage = regulator_list_voltage_linear, +}; + +static struct regulator_ops axp20x_ops_table = { + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_table, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static struct regulator_ops axp20x_ops = { + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_desc axp20x_regulators[] = { + AXP20X_DESC(DCDC2, "vin2", 700, 2275, 25, AXP20X_DCDC2_V_OUT, 0x3f, + AXP20X_PWR_OUT_CTRL, 0x10), + AXP20X_DESC(DCDC3, "vin3", 700, 3500, 25, AXP20X_DCDC3_V_OUT, 0x7f, + AXP20X_PWR_OUT_CTRL, 0x02), + AXP20X_DESC_FIXED(LDO1, "acin", 1300), + AXP20X_DESC(LDO2, "ldo24in", 1800, 3300, 100, AXP20X_LDO24_V_OUT, 0xf0, + AXP20X_PWR_OUT_CTRL, 0x04), + AXP20X_DESC(LDO3, "ldo3in", 700, 3500, 25, AXP20X_LDO3_V_OUT, 0x7f, + AXP20X_PWR_OUT_CTRL, 0x40), + AXP20X_DESC_TABLE(LDO4, "ldo24in", axp20x_ldo4_data, AXP20X_LDO24_V_OUT, 0x0f, + AXP20X_PWR_OUT_CTRL, 0x08), + AXP20X_DESC_IO(LDO5, "ldo5in", 1800, 3300, 100, AXP20X_LDO5_V_OUT, 0xf0, + AXP20X_GPIO0_CTRL, 0x07, AXP20X_IO_ENABLED, + AXP20X_IO_DISABLED), +}; + +#define AXP_MATCH(_name, _id) \ + [AXP20X_##_id] = { \ + .name = #_name, \ + .driver_data = (void *) &axp20x_regulators[AXP20X_##_id], \ + } + +static struct of_regulator_match axp20x_matches[] = { + AXP_MATCH(dcdc2, DCDC2), + AXP_MATCH(dcdc3, DCDC3), + AXP_MATCH(ldo1, LDO1), + AXP_MATCH(ldo2, LDO2), + AXP_MATCH(ldo3, LDO3), + AXP_MATCH(ldo4, LDO4), + AXP_MATCH(ldo5, LDO5), +}; + +static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq) +{ + struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); + + if (dcdcfreq < 750) { + dcdcfreq = 750; + dev_warn(&pdev->dev, "DCDC frequency too low. Set to 750kHz\n"); + } + + if (dcdcfreq > 1875) { + dcdcfreq = 1875; + dev_warn(&pdev->dev, "DCDC frequency too high. Set to 1875kHz\n"); + } + + dcdcfreq = (dcdcfreq - 750) / 75; + + return regmap_update_bits(axp20x->regmap, AXP20X_DCDC_FREQ, + AXP20X_FREQ_DCDC_MASK, dcdcfreq); +} + +static int axp20x_regulator_parse_dt(struct platform_device *pdev) +{ + struct device_node *np, *regulators; + int ret; + u32 dcdcfreq; + + np = of_node_get(pdev->dev.parent->of_node); + if (!np) + return 0; + + regulators = of_find_node_by_name(np, "regulators"); + if (!regulators) { + dev_warn(&pdev->dev, "regulators node not found\n"); + } else { + ret = of_regulator_match(&pdev->dev, regulators, axp20x_matches, + ARRAY_SIZE(axp20x_matches)); + if (ret < 0) { + dev_err(&pdev->dev, "Error parsing regulator init data: %d\n", ret); + return ret; + } + + dcdcfreq = 1500; + of_property_read_u32(regulators, "x-powers,dcdc-freq", &dcdcfreq); + ret = axp20x_set_dcdc_freq(pdev, dcdcfreq); + if (ret < 0) { + dev_err(&pdev->dev, "Error setting dcdc frequency: %d\n", ret); + return ret; + } + + of_node_put(regulators); + } + + return 0; +} + +static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 workmode) +{ + unsigned int mask = AXP20X_WORKMODE_DCDC2_MASK; + + if ((id != AXP20X_DCDC2) && (id != AXP20X_DCDC3)) + return -EINVAL; + + if (id == AXP20X_DCDC3) + mask = AXP20X_WORKMODE_DCDC3_MASK; + + workmode <<= ffs(mask) - 1; + + return regmap_update_bits(rdev->regmap, AXP20X_DCDC_MODE, mask, workmode); +} + +static int axp20x_regulator_probe(struct platform_device *pdev) +{ + struct regulator_dev *rdev; + struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = { }; + struct regulator_init_data *init_data; + int ret, i; + u32 workmode; + + ret = axp20x_regulator_parse_dt(pdev); + if (ret) + return ret; + + for (i = 0; i < AXP20X_REG_ID_MAX; i++) { + init_data = axp20x_matches[i].init_data; + + config.dev = &pdev->dev; + config.init_data = init_data; + config.regmap = axp20x->regmap; + config.of_node = axp20x_matches[i].of_node; + + rdev = devm_regulator_register(&pdev->dev, &axp20x_regulators[i], + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "Failed to register %s\n", + axp20x_regulators[i].name); + + return PTR_ERR(rdev); + } + + ret = of_property_read_u32(axp20x_matches[i].of_node, "x-powers,dcdc-workmode", + &workmode); + if (!ret) { + if (axp20x_set_dcdc_workmode(rdev, i, workmode)) + dev_err(&pdev->dev, "Failed to set workmode on %s\n", + axp20x_regulators[i].name); + } + } + + return 0; +} + +static struct platform_driver axp20x_regulator_driver = { + .probe = axp20x_regulator_probe, + .driver = { + .name = "axp20x-regulator", + .owner = THIS_MODULE, + }, +}; + +module_platform_driver(axp20x_regulator_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Carlo Caione "); +MODULE_DESCRIPTION("Regulator Driver for AXP20X PMIC");