From patchwork Tue Apr 22 01:39:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 4027931 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4357A9F387 for ; Tue, 22 Apr 2014 01:43:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2493920340 for ; Tue, 22 Apr 2014 01:43:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1AD0420160 for ; Tue, 22 Apr 2014 01:43:16 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WcPgj-0006dS-7K; Tue, 22 Apr 2014 01:39:57 +0000 Received: from mail-pb0-x232.google.com ([2607:f8b0:400e:c01::232]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WcPgf-0006bj-RE for linux-arm-kernel@lists.infradead.org; Tue, 22 Apr 2014 01:39:54 +0000 Received: by mail-pb0-f50.google.com with SMTP id md12so4338013pbc.37 for ; Mon, 21 Apr 2014 18:39:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=A56tW69j9QoRpZtt93kkCZk4Kv2+Ahbp0o9Vk4GIMuk=; b=jmU1L0TN31L4cE0uEh66Td6/K7OWWxe79EMJ/ElifXpjD6A9EXoxf0uHoGNOwbOW65 z7t0sv2KR07DY/bbMp0OuOxxnSKJEjYlrG26/IkWXjz1GTUteZWWP/DJbIo+kZHEaRd5 s4C53IJ193oDXTZd7lryHrbYqqKCWpyM+TE/si1wcW96wveuZTbDBPcnPf4Jrs3ZkFok xkW+omP8AUPt8hBrtgBSK+66+vYe+g4uEzBM8SQ34RynB77mYlwqDuBw3KghP/j8Kgb5 EKCB/LjZMw5r7tSpfoik1KlCxrFvWpKnp47RE4XI7LIQB+H/NBmT9frBwj/ZEO25MaOE eCfA== X-Received: by 10.68.136.2 with SMTP id pw2mr18079pbb.167.1398130772911; Mon, 21 Apr 2014 18:39:32 -0700 (PDT) Received: from fainelli-desktop.broadcom.com (5520-maca-inet1-outside.broadcom.com. [216.31.211.11]) by mx.google.com with ESMTPSA id n6sm80964520pbj.22.2014.04.21.18.39.31 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 21 Apr 2014 18:39:32 -0700 (PDT) From: Florian Fainelli To: linux-arm-kernel@lists.infradead.org Subject: [PATCH RESEND 1/5] ARM: BCM63XX: add basic support for the Broadcom BCM63138 DSL SoC Date: Mon, 21 Apr 2014 18:39:14 -0700 Message-Id: <1398130758-19456-2-git-send-email-f.fainelli@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1398130758-19456-1-git-send-email-f.fainelli@gmail.com> References: <1398130758-19456-1-git-send-email-f.fainelli@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140421_183953_921191_B3AD0B7A X-CRM114-Status: GOOD ( 19.33 ) X-Spam-Score: -0.1 (/) Cc: devicetree@vger.kernel.org, cernekee@gmail.com, arnd@arndb.de, bcm@fixthebug.org, mporter@linaro.org, jogo@openwrt.org, Florian Fainelli , aelder@linaro.org, olof@lixom.net, mbizon@freebox.fr, jpeshkin@broadcom.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds basic support for the Broadcom BCM63138 DSL SoC which is using a dual-core Cortex A9 system. Add the very minimum required code boot Linux on this SoC. Due to the two specific register address spaces located at 0x8000_0000 and 0xfffe_0000, we need to setup a specific iotable descriptor for those to be remapped at the expected virtual addresses. Finally, the PL310 cache controller requires a bit of tweaking before handing its initialization over l2x0_of_init(), this is also taken care of to make sure that its size is properly configured. Signed-off-by: Florian Fainelli --- .../devicetree/bindings/arm/bcm/bcm63138.txt | 9 +++ arch/arm/mach-bcm/Kconfig | 20 +++++ arch/arm/mach-bcm/Makefile | 1 + arch/arm/mach-bcm/bcm63xx.h | 29 +++++++ arch/arm/mach-bcm/board_bcm63xx.c | 94 ++++++++++++++++++++++ 5 files changed, 153 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/bcm/bcm63138.txt create mode 100644 arch/arm/mach-bcm/bcm63xx.h create mode 100644 arch/arm/mach-bcm/board_bcm63xx.c diff --git a/Documentation/devicetree/bindings/arm/bcm/bcm63138.txt b/Documentation/devicetree/bindings/arm/bcm/bcm63138.txt new file mode 100644 index 000000000000..bd49987a8812 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/bcm/bcm63138.txt @@ -0,0 +1,9 @@ +Broadcom BCM63138 DSL System-on-a-Chip device tree bindings +----------------------------------------------------------- + +Boards compatible with the BCM63138 DSL System-on-a-Chip should have the +following properties: + +Required root node property: + +compatible: should be "brcm,bcm63138" diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig index 49c914cd9c7a..26b51bcf878c 100644 --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig @@ -69,6 +69,26 @@ config ARCH_BCM_5301X different SoC or with the older BCM47XX and BCM53XX based network SoC using a MIPS CPU, they are supported by arch/mips/bcm47xx +config ARCH_BCM_63XX + bool "Broadcom BCM63xx DSL SoC" if ARCH_MULTI_V7 + depends on MMU + select ARM_ERRATA_754322 + select ARM_ERRATA_764369 if SMP + select ARM_GIC + select ARM_GLOBAL_TIMER + select CACHE_L2X0 + select COMMON_CLK + select CPU_V7 + select GENERIC_CLOCKEVENTS + select HAVE_ARM_ARCH_TIMER + select HAVE_ARM_TWD if SMP + select HAVE_ARM_SCU if SMP + select HAVE_SMP + help + This enables support for systems based on Broadcom DSL SoCs. + It currently supports the 'BCM63XX' ARM-based family, which includes + the BCM63138 variant. + endmenu endif diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile index a326b28c4406..c24ba586297d 100644 --- a/arch/arm/mach-bcm/Makefile +++ b/arch/arm/mach-bcm/Makefile @@ -17,3 +17,4 @@ obj-$(CONFIG_ARCH_BCM2835) += board_bcm2835.o plus_sec := $(call as-instr,.arch_extension sec,+sec) AFLAGS_bcm_kona_smc_asm.o :=-Wa,-march=armv7-a$(plus_sec) obj-$(CONFIG_ARCH_BCM_5301X) += bcm_5301x.o +obj-$(CONFIG_ARCH_BCM_63XX) := board_bcm63xx.o diff --git a/arch/arm/mach-bcm/bcm63xx.h b/arch/arm/mach-bcm/bcm63xx.h new file mode 100644 index 000000000000..95872c8131f6 --- /dev/null +++ b/arch/arm/mach-bcm/bcm63xx.h @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2014 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ARM_BCM63XX_H +#define __ARM_BCM63XX_H + +#define IO_ADDRESS(x) (((x) & 0x00ffffff) + 0xfc000000) + +/* AHB register space */ +#define BCM63XX_AHB_PHYS 0x80001000 +#define BCM63XX_AHB_VIRT IO_ADDRESS(BCM63XX_AHB_PHYS) +#define BCM63XX_AHB_SIZE 0x800000 + +/* PERIPH (legacy) register space */ +#define BCM63XX_PERIPH_PHYS 0xfffe8000 +#define BCM63XX_PERIPH_VIRT IO_ADDRESS(BCM63XX_PERIPH_PHYS) +#define BCM63XX_PERIPH_SIZE 0x10000 + +#endif /* __ARM_BCM63XX_H */ diff --git a/arch/arm/mach-bcm/board_bcm63xx.c b/arch/arm/mach-bcm/board_bcm63xx.c new file mode 100644 index 000000000000..a779aca673c4 --- /dev/null +++ b/arch/arm/mach-bcm/board_bcm63xx.c @@ -0,0 +1,94 @@ +/* + * Copyright (C) 2014 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "bcm63xx.h" + +static void __init bcm63xx_l2cc_init(void) +{ + u32 auxctl_val = 0, auxctl_msk = ~0UL; + + /* 16-way cache */ + auxctl_val |= (1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT); + auxctl_msk &= ~(1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT); + /* 32 KB */ + auxctl_val |= (2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT); + auxctl_msk &= ~(L2X0_AUX_CTRL_WAY_SIZE_MASK); + + /* + * Set bit 22 in the auxiliary control register. If this bit + * is cleared, PL310 treats Normal Shared Non-cacheable + * accesses as Cacheable no-allocate. + */ + auxctl_val |= (1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT); + + /* Allow non-secure access */ + auxctl_val |= (1 << L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT); + /* Instruction prefetch */ + auxctl_val |= (1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT); + /* Early BRESP */ + auxctl_val |= (1 << L2X0_AUX_CTRL_EARLY_BRESP_SHIFT); + + l2x0_of_init(auxctl_val, auxctl_msk); +} + +static void __init bcm63xx_init(void) +{ + of_platform_populate(NULL, of_default_bus_match_table, NULL, + &platform_bus); + bcm63xx_l2cc_init(); +} + +static const char * const bcm63xx_dt_compat[] = { + "brcm,bcm63138", + NULL +}; + +static struct map_desc bcm63xx_map_desc[] __initdata = { + /* AHB register space */ + { + .virtual = BCM63XX_AHB_VIRT, + .pfn = __phys_to_pfn(BCM63XX_AHB_PHYS), + .length = BCM63XX_AHB_SIZE, + .type = MT_DEVICE, + }, + /* PERIPH register space */ + { + .virtual = BCM63XX_PERIPH_VIRT, + .pfn = __phys_to_pfn(BCM63XX_PERIPH_PHYS), + .length = BCM63XX_PERIPH_SIZE, + .type = MT_DEVICE, + }, +}; + +static void __init bcm63xx_map_io(void) +{ + iotable_init(bcm63xx_map_desc, ARRAY_SIZE(bcm63xx_map_desc)); +} + +DT_MACHINE_START(BCM63XXX_DT, "BCM63xx DSL SoC") + .map_io = bcm63xx_map_io, + .init_machine = bcm63xx_init, + .dt_compat = bcm63xx_dt_compat, +MACHINE_END