| Message ID | 1398700371-20096-3-git-send-email-a.motakis@virtualopensystems.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, Apr 28, 2014 at 04:52:42PM +0100, Antonios Motakis wrote: > The ARM SMMU can take an IOMMU_EXEC protection flag in addition to > IOMMU_READ and IOMMU_WRITE. Expose this as an IOMMU capability. The other way of handling this would be to negate the capability and advertise a NOEXEC cap instead. That would need the IOMMU_EXEC flag to become IOMMU_NOEXEC and the ARM SMMU driver updating accordingly, but it might make more sense if people don't object to mixing positive and negative logic in the IOMMU_* flags. Any thoughts? Will
On Mon, 2014-04-28 at 20:37 +0100, Will Deacon wrote: > On Mon, Apr 28, 2014 at 04:52:42PM +0100, Antonios Motakis wrote: > > The ARM SMMU can take an IOMMU_EXEC protection flag in addition to > > IOMMU_READ and IOMMU_WRITE. Expose this as an IOMMU capability. > > The other way of handling this would be to negate the capability and > advertise a NOEXEC cap instead. That would need the IOMMU_EXEC flag to > become IOMMU_NOEXEC and the ARM SMMU driver updating accordingly, but it > might make more sense if people don't object to mixing positive and negative > logic in the IOMMU_* flags. > > Any thoughts? A benefit of doing that would be that the flag becomes enforceable. As written in this draft, if a user does not specify EXEC, the mapping may or may not be executable, depending on the IOMMU capability (assuming that if EXEC is not supported that it follows READ). If the flag changes to NOEXEC, then all the domains in the container should support it or else the mapping should fail. We could also avoid the test in vfio code when doing a mapping and just let the IOMMU driver fail the map if NOEXEC is unsupported. Thanks, Alex
On Mon, Apr 28, 2014 at 9:37 PM, Will Deacon <will.deacon@arm.com> wrote: > On Mon, Apr 28, 2014 at 04:52:42PM +0100, Antonios Motakis wrote: >> The ARM SMMU can take an IOMMU_EXEC protection flag in addition to >> IOMMU_READ and IOMMU_WRITE. Expose this as an IOMMU capability. > > The other way of handling this would be to negate the capability and > advertise a NOEXEC cap instead. That would need the IOMMU_EXEC flag to > become IOMMU_NOEXEC and the ARM SMMU driver updating accordingly, but it > might make more sense if people don't object to mixing positive and negative > logic in the IOMMU_* flags. > > Any thoughts? > I agree, that would be simpler for the user. As it is now we have to worry about whether the EXEC flac is available just to use the PL330, with NOEXEC the device would always be usable by default. > Will
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 1d9ab39..abf802f 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1509,6 +1509,8 @@ static int arm_smmu_domain_has_cap(struct iommu_domain *domain, if (smmu_domain->root_cfg.smmu->features & ARM_SMMU_FEAT_COHERENT_WALK) caps |= IOMMU_CAP_CACHE_COHERENCY; + caps |= IOMMU_CAP_DMA_EXEC; + return !!(cap & caps); } diff --git a/include/linux/iommu.h b/include/linux/iommu.h index b96a5b2..4f547f3 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -57,8 +57,9 @@ struct iommu_domain { struct iommu_domain_geometry geometry; }; -#define IOMMU_CAP_CACHE_COHERENCY 0x1 -#define IOMMU_CAP_INTR_REMAP 0x2 /* isolates device intrs */ +#define IOMMU_CAP_CACHE_COHERENCY (1 << 0) +#define IOMMU_CAP_INTR_REMAP (1 << 1) /* isolates device intrs */ +#define IOMMU_CAP_DMA_EXEC (1 << 2) /* EXEC protection flag */ /* * Following constraints are specifc to FSL_PAMUV1:
The ARM SMMU can take an IOMMU_EXEC protection flag in addition to IOMMU_READ and IOMMU_WRITE. Expose this as an IOMMU capability. Signed-off-by: Antonios Motakis <a.motakis@virtualopensystems.com> --- drivers/iommu/arm-smmu.c | 2 ++ include/linux/iommu.h | 5 +++-- 2 files changed, 5 insertions(+), 2 deletions(-)