From patchwork Mon May 5 20:09:26 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 4117021 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 73FD1BFF02 for ; Mon, 5 May 2014 20:12:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8DA5E2024C for ; Mon, 5 May 2014 20:12:34 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AE27F20219 for ; Mon, 5 May 2014 20:12:33 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WhPDm-0007Pj-0v; Mon, 05 May 2014 20:10:42 +0000 Received: from arroyo.ext.ti.com ([192.94.94.40]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WhPCz-0005po-IZ for linux-arm-kernel@lists.infradead.org; Mon, 05 May 2014 20:09:55 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s45K9Xa7013849; Mon, 5 May 2014 15:09:33 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s45K9Xqf025344; Mon, 5 May 2014 15:09:33 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.174.1; Mon, 5 May 2014 15:09:33 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s45K9XNp020722; Mon, 5 May 2014 15:09:33 -0500 Received: from localhost (j-172-22-140-142.vpn.ti.com [172.22.140.142]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id s45K9Wt09750; Mon, 5 May 2014 15:09:32 -0500 (CDT) From: Dan Murphy To: , , , Subject: [RFC] [v2 Patch 5/6] ARM: dts: dra7: Add prm_resets node Date: Mon, 5 May 2014 15:09:26 -0500 Message-ID: <1399320567-3639-6-git-send-email-dmurphy@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1399320567-3639-1-git-send-email-dmurphy@ti.com> References: <1399320567-3639-1-git-send-email-dmurphy@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140505_130953_730428_B370C0E6 X-CRM114-Status: GOOD ( 11.30 ) X-Spam-Score: -5.7 (-----) Cc: Dan Murphy X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the prcm_resets node to the prm parent node. Add the draxx_resets file to define the dra7xx reset lines that are handled by this reset framework. Signed-off-by: Dan Murphy --- arch/arm/boot/dts/dra7.dtsi | 7 +++ arch/arm/boot/dts/dra7xx-resets.dtsi | 82 ++++++++++++++++++++++++++++++++++ 2 files changed, 89 insertions(+) create mode 100644 arch/arm/boot/dts/dra7xx-resets.dtsi diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 149b550..c008996 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -120,6 +120,12 @@ prm_clockdomains: clockdomains { }; + + prm_resets: resets { + #address-cells = <1>; + #size-cells = <1>; + #reset-cells = <1>; + }; }; cm_core_aon: cm_core_aon@4a005000 { @@ -793,3 +799,4 @@ }; /include/ "dra7xx-clocks.dtsi" +/include/ "dra7xx-resets.dtsi" diff --git a/arch/arm/boot/dts/dra7xx-resets.dtsi b/arch/arm/boot/dts/dra7xx-resets.dtsi new file mode 100644 index 0000000..4c4966d --- /dev/null +++ b/arch/arm/boot/dts/dra7xx-resets.dtsi @@ -0,0 +1,82 @@ +/* + * Device Tree Source for DRA7XX reset data + * + * Copyright (C) 2014 Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +&prm_resets { + dsp_rstctrl { + reg = <0x410>, + <0x414>; + + dsp_reset: dsp_reset { + control-bit = <0x01>; + status-bit = <0x01>; + }; + + dsp_mmu_reset: dsp_mmu_reset { + control-bit = <0x02>; + status-bit = <0x02>; + }; + }; + + ipu_rstctrl { + reg = <0x510>, + <0x514>; + + ipu_cpu0_reset: ipu_cpu0_reset { + control-bit = <0x01>; + status-bit = <0x01>; + }; + + ipu_cpu1_reset: ipu_cpu1_reset { + control-bit = <0x02>; + status-bit = <0x02>; + }; + + ipu_mmu_reset: ipu_mmu_reset { + control-bit = <0x04>; + status-bit = <0x04>; + }; + }; + + iva_rstctrl { + reg = <0xf10>, + <0xf14>; + + iva_reset: iva_reset { + control-bit = <0x01>; + status-bit = <0x01>; + }; + }; + + pcie_rstctrl { + reg = <0x1310>, + <0x1314>; + + pcie1_reset: pcie1_reset { + control-bit = <0x01>; + status-bit = <0x01>; + }; + + pcie2_reset: pcie2_reset { + control-bit = <0x01>; + status-bit = <0x01>; + }; + }; + + device_rstctrl { + reg = <0x1D00>, + <0x1D04>; + + device_reset: device_reset { + control-bit = <0x01>; + status-bit = <0x01>; + }; + }; + +};