| Message ID | 1399330337-16748-2-git-send-email-tthayer@altera.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Thor, On Mon, 2014-05-05 at 05:52PM -0500, tthayer@altera.com wrote: > From: Thor Thayer <tthayer@altera.com> > > Addition of the Altera SDRAM controller bindings and device > tree changes to the Altera SoC project. The "syscon" parameter > is included here because the SDRAM EDAC bits are shared with the SDRAM > configuration bits. > --- > v2: Changes to SoC SDRAM EDAC code. > > V3: Implement code suggestions for SDRAM EDAC code. > > Signed-off-by: Thor Thayer <tthayer@altera.com> > --- > .../bindings/arm/altera/socfpga-sdram.txt | 14 ++++++++++++++ > arch/arm/boot/dts/socfpga.dtsi | 5 +++++ > 2 files changed, 19 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt > > diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt > new file mode 100644 > index 0000000..525cb76 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt > @@ -0,0 +1,14 @@ > +Altera SOCFPGA SDRAM Controller > + > +Required properties: > +- compatible : "altr,sdr-ctl", "syscon"; > + Note that syscon is invoked for this device to support the FPGA > + bridge driver, EDAC driver and other devices that share the > + registers. This sounds like implementation specifics, which shouldn't be part of the bindings. Sören
Hi Sören On Mon, May 5, 2014 at 6:16 PM, Sören Brinkmann <soren.brinkmann@xilinx.com> wrote: > > Hi Thor, > > On Mon, 2014-05-05 at 05:52PM -0500, tthayer@altera.com wrote: > > From: Thor Thayer <tthayer@altera.com> > > > > Addition of the Altera SDRAM controller bindings and device > > tree changes to the Altera SoC project. The "syscon" parameter > > is included here because the SDRAM EDAC bits are shared with the SDRAM > > configuration bits. > > --- > > v2: Changes to SoC SDRAM EDAC code. > > > > V3: Implement code suggestions for SDRAM EDAC code. > > > > Signed-off-by: Thor Thayer <tthayer@altera.com> > > --- > > .../bindings/arm/altera/socfpga-sdram.txt | 14 ++++++++++++++ > > arch/arm/boot/dts/socfpga.dtsi | 5 +++++ > > 2 files changed, 19 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt > > > > diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt > > new file mode 100644 > > index 0000000..525cb76 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt > > @@ -0,0 +1,14 @@ > > +Altera SOCFPGA SDRAM Controller > > + > > +Required properties: > > +- compatible : "altr,sdr-ctl", "syscon"; > > + Note that syscon is invoked for this device to support the FPGA > > + bridge driver, EDAC driver and other devices that share the > > + registers. > > This sounds like implementation specifics, which shouldn't be part of > the bindings. > > Sören > I see your point and will remove. Thanks!
diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt new file mode 100644 index 0000000..525cb76 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt @@ -0,0 +1,14 @@ +Altera SOCFPGA SDRAM Controller + +Required properties: +- compatible : "altr,sdr-ctl", "syscon"; + Note that syscon is invoked for this device to support the FPGA + bridge driver, EDAC driver and other devices that share the + registers. +- reg : Should contain 1 register ranges(address and length) + +Example: + sdrctl@ffc25000 { + compatible = "altr,sdr-ctl", "syscon"; + reg = <0xffc25000 0x1000>; + }; diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index df43702..6ce912e 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -676,6 +676,11 @@ clocks = <&l4_sp_clk>; }; + sdrctl@ffc25000 { + compatible = "altr,sdr-ctl", "syscon"; + reg = <0xffc25000 0x1000>; + }; + rstmgr@ffd05000 { compatible = "altr,rst-mgr"; reg = <0xffd05000 0x1000>;