From patchwork Tue May 6 15:26:17 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean Pihet X-Patchwork-Id: 4122351 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id AEE9E9F23C for ; Tue, 6 May 2014 15:29:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C1252201EF for ; Tue, 6 May 2014 15:29:51 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D0006201C8 for ; Tue, 6 May 2014 15:29:50 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WhhGy-0004kS-UD; Tue, 06 May 2014 15:27:12 +0000 Received: from mail-ee0-f41.google.com ([74.125.83.41]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WhhGm-0004Ue-LF for linux-arm-kernel@lists.infradead.org; Tue, 06 May 2014 15:27:01 +0000 Received: by mail-ee0-f41.google.com with SMTP id t10so2990593eei.28 for ; Tue, 06 May 2014 08:26:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HvAREHdygHv2qUdErj9GJLXETCulYnJnWWxbTRyUOOc=; b=Dx+Uypaa2ysSnslVRF7s/rVsl5WFdfE1/yDDQnRKpwaB3KGI7vlKC7JjwD4BSeapTc xzNXz0/qx5zSWt67vv7I0Kzw8ohsbDwSPENp67eeuwzvo2ct0HIP+KAIPrqhvE2Glj6u svCTZK2axEI7Z/wblVBHBQCN+3nkTDC3yCxMV/hf5Xnee8cuprftMVqbhdkHmTnkCMob ldEqJ3RF81EqBolEl6wVQAY9x1VsUAn/mjRt9iKOoMg12oLega9z3okHYPl7rvzMYtXT gd/6Il9S2nW0TPEJVmmKFZ68AOfDJgNxY6VdbzNW94Nc/Xaz6FrkxdoKAqE26vIVLStA txmQ== X-Gm-Message-State: ALoCoQlVA9lfF1ATeQZW+ePdwSlZ3sDdW9f/kf+t6qScScjKKqzfuV9nOj//7UBn5QKDZDFLohYR X-Received: by 10.14.108.8 with SMTP id p8mr11937579eeg.49.1399389998586; Tue, 06 May 2014 08:26:38 -0700 (PDT) Received: from localhost.localdomain (193.219-240-81.adsl-dyn.isp.belgacom.be. [81.240.219.193]) by mx.google.com with ESMTPSA id s46sm39364798ees.3.2014.05.06.08.26.36 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 06 May 2014 08:26:37 -0700 (PDT) From: Jean Pihet To: Jiri Olsa , Arnaldo Carvalho de Melo , will.deacon@arm.com Subject: [PATCH 1/3] perf tests: Introduce perf_regs_load function on ARM Date: Tue, 6 May 2014 17:26:17 +0200 Message-Id: <1399389979-11279-2-git-send-email-jean.pihet@linaro.org> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1399389979-11279-1-git-send-email-jean.pihet@linaro.org> References: <1399389979-11279-1-git-send-email-jean.pihet@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140506_082700_850192_8D048A3C X-CRM114-Status: GOOD ( 17.10 ) X-Spam-Score: -0.7 (/) Cc: "linaro-kernel@lists.linaro.org" , Peter Zijlstra , Corey Ashford , Frederic Weisbecker , "linux-kernel@vger.kernel.org" , Paul Mackerras , David Ahern , Namhyung Kim , Jean Pihet , Ingo Molnar , "linux-arm-kernel@lists.infradead.org" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Introducing perf_regs_load function, which is going to be used for dwarf unwind test in following patches. It takes single argument as a pointer to the regs dump buffer and populates it with current registers values. Signed-off-by: Jean Pihet Cc: Corey Ashford Cc: Frederic Weisbecker Cc: Ingo Molnar Cc: Namhyung Kim Cc: Paul Mackerras Cc: Peter Zijlstra Cc: Arnaldo Carvalho de Melo Cc: David Ahern Cc: Jiri Olsa --- tools/perf/arch/arm/Makefile | 1 + tools/perf/arch/arm/include/perf_regs.h | 2 ++ tools/perf/arch/arm/tests/regs_load.S | 60 +++++++++++++++++++++++++++++++++ 3 files changed, 63 insertions(+) create mode 100644 tools/perf/arch/arm/tests/regs_load.S diff --git a/tools/perf/arch/arm/Makefile b/tools/perf/arch/arm/Makefile index 67e9b3d..9b8f87e 100644 --- a/tools/perf/arch/arm/Makefile +++ b/tools/perf/arch/arm/Makefile @@ -4,4 +4,5 @@ LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o endif ifndef NO_LIBUNWIND LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/unwind-libunwind.o +LIB_OBJS += $(OUTPUT)arch/$(ARCH)/tests/regs_load.o endif diff --git a/tools/perf/arch/arm/include/perf_regs.h b/tools/perf/arch/arm/include/perf_regs.h index 2a1cfde..1476ae7 100644 --- a/tools/perf/arch/arm/include/perf_regs.h +++ b/tools/perf/arch/arm/include/perf_regs.h @@ -5,6 +5,8 @@ #include "../../util/types.h" #include +void perf_regs_load(u64 *regs); + #define PERF_REGS_MASK ((1ULL << PERF_REG_ARM_MAX) - 1) #define PERF_REG_IP PERF_REG_ARM_PC #define PERF_REG_SP PERF_REG_ARM_SP diff --git a/tools/perf/arch/arm/tests/regs_load.S b/tools/perf/arch/arm/tests/regs_load.S new file mode 100644 index 0000000..66a10b6 --- /dev/null +++ b/tools/perf/arch/arm/tests/regs_load.S @@ -0,0 +1,60 @@ +#include +#include + +#define R0 0x00 +#define R1 0x08 +#define R2 0x10 +#define R3 0x18 +#define R4 0x20 +#define R5 0x28 +#define R6 0x30 +#define R7 0x38 +#define R8 0x40 +#define R9 0x48 +#define SL 0x50 +#define FP 0x58 +#define IP 0x60 +#define SP 0x68 +#define LR 0x70 +#define PC 0x78 + +/* + * Implementation of void perf_regs_load(u64 *regs); + * + * This functions fills in the 'regs' buffer from the actual registers values, + * in the way the perf built-in unwinding test expects them: + * - the return values (i.e. caller values) of fp, sp and lr are retrieved + * and stored from the fp, in order to skip the call to this function. + * The built-in unwinding test then unwinds the call stack from the dwarf + * information in unwind__get_entries. + * + * Notes: + * - the 8 bytes stride in the registers offsets comes from the fact + * that the registers are stored in an u64 array (u64 *regs), + * - since perf is built with -fno-omit-frame-pointer, the fp value can + * be used to retrieve the caller values of fp, sp, lr. + */ + +.text +ENTRY(perf_regs_load) + str r0, [r0, #R0] + str r1, [r0, #R1] + str r2, [r0, #R2] + str r3, [r0, #R3] + str r4, [r0, #R4] + str r5, [r0, #R5] + str r6, [r0, #R6] + str r7, [r0, #R7] + str r8, [r0, #R8] + str r9, [r0, #R9] + str sl, [r0, #SL] + ldr r2, [fp, #-12] @ retrieve and save return fp + str r2, [r0, #FP] + str ip, [r0, #IP] + ldr r2, [fp, #-8] @ retrieve and save return sp + str r2, [r0, #SP] + ldr r2, [fp, #-4] @ retrieve and save return lr + str r2, [r0, #LR] + str pc, [r0, #PC] + mov pc, lr +ENDPROC(perf_regs_load)