From patchwork Fri May 9 09:59:00 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Shiyan X-Patchwork-Id: 4141161 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3A90EBFF02 for ; Fri, 9 May 2014 10:02:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 571EC201BB for ; Fri, 9 May 2014 10:01:59 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 720BB200DF for ; Fri, 9 May 2014 10:01:58 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wiham-0002Hg-ET; Fri, 09 May 2014 09:59:48 +0000 Received: from smtp30.i.mail.ru ([94.100.177.90]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WihaX-0002DV-CY for linux-arm-kernel@lists.infradead.org; Fri, 09 May 2014 09:59:35 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail2; h=Message-Id:Date:Subject:Cc:To:From; bh=HNqpkQTxv/P6gY0xRj+WEAWrBRhVuX9g1MARatVteb0=; b=Gn4BYqwOWJTsx00OHObYMsDRPot/Z/LH34Vh/+xJLBr7Ji+BvXliGDrQW2ueKOQr9vMVjJVVI5zWl0wZXIlhfAMODXWmIdHoiVoboSpI+7k7ibc1YgmmewQTXuljjt2wvXVo3Tz0AdG/+D7hz14lkFQOL6JXidCQauJ+YzozMdE=; Received: from [5.18.98.0] (port=53431 helo=shc.zet) by smtp30.i.mail.ru with esmtpa (envelope-from ) id 1Wiha9-0002Kh-3x; Fri, 09 May 2014 13:59:09 +0400 From: Alexander Shiyan To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/3] ARM: i.MX1 clk: Add missing clocks Date: Fri, 9 May 2014 13:59:00 +0400 Message-Id: <1399629542-32387-1-git-send-email-shc_work@mail.ru> X-Mailer: git-send-email 1.8.3.2 X-Mras: Ok X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140509_025934_050609_98D529A2 X-CRM114-Status: GOOD ( 11.06 ) X-Spam-Score: -0.1 (/) Cc: Alexander Shiyan , Sascha Hauer , Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, FREEMAIL_FROM, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds missing clocks for mpll_gate, spll_gate, uart3_gate, ssi2_gate and brom_gate. As an additional this fixes incorrect bit position for dma_gate clock. Signed-off-by: Alexander Shiyan --- arch/arm/mach-imx/clk-imx1.c | 33 ++++++++++++++++++++------------- 1 file changed, 20 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c index 15f9d22..602b30a 100644 --- a/arch/arm/mach-imx/clk-imx1.c +++ b/arch/arm/mach-imx/clk-imx1.c @@ -40,12 +40,14 @@ #define SCM_GCCR IO_ADDR_SCM(0xc) static const char *prem_sel_clks[] = { "clk32_premult", "clk16m", }; -static const char *clko_sel_clks[] = { "per1", "hclk", "clk48m", "clk16m", "prem", - "fclk", }; +static const char *clko_sel_clks[] = { "per1", "hclk", "clk48m", "clk16m", + "prem", "fclk", }; + enum imx1_clks { - dummy, clk32, clk16m_ext, clk16m, clk32_premult, prem, mpll, spll, mcu, - fclk, hclk, clk48m, per1, per2, per3, clko, dma_gate, csi_gate, - mma_gate, usbd_gate, clk_max + dummy, clk32, clk16m_ext, clk16m, clk32_premult, prem, mpll, mpll_gate, + spll, spll_gate, mcu, fclk, hclk, clk48m, per1, per2, per3, clko, + uart3_gate, ssi2_gate, brom_gate, dma_gate, csi_gate, mma_gate, + usbd_gate, clk_max }; static struct clk *clk[clk_max]; @@ -62,17 +64,22 @@ int __init mx1_clocks_init(unsigned long fref) clk[prem] = imx_clk_mux("prem", CCM_CSCR, 16, 1, prem_sel_clks, ARRAY_SIZE(prem_sel_clks)); clk[mpll] = imx_clk_pllv1("mpll", "clk32_premult", CCM_MPCTL0); + clk[mpll_gate] = imx_clk_gate("mpll_gate", "mpll", CCM_CSCR, 0); clk[spll] = imx_clk_pllv1("spll", "prem", CCM_SPCTL0); + clk[spll_gate] = imx_clk_gate("spll_gate", "spll", CCM_CSCR, 1); clk[mcu] = imx_clk_divider("mcu", "clk32_premult", CCM_CSCR, 15, 1); - clk[fclk] = imx_clk_divider("fclk", "mpll", CCM_CSCR, 15, 1); - clk[hclk] = imx_clk_divider("hclk", "spll", CCM_CSCR, 10, 4); - clk[clk48m] = imx_clk_divider("clk48m", "spll", CCM_CSCR, 26, 3); - clk[per1] = imx_clk_divider("per1", "spll", CCM_PCDR, 0, 4); - clk[per2] = imx_clk_divider("per2", "spll", CCM_PCDR, 4, 4); - clk[per3] = imx_clk_divider("per3", "spll", CCM_PCDR, 16, 7); + clk[fclk] = imx_clk_divider("fclk", "mpll_gate", CCM_CSCR, 15, 1); + clk[hclk] = imx_clk_divider("hclk", "spll_gate", CCM_CSCR, 10, 4); + clk[clk48m] = imx_clk_divider("clk48m", "spll_gate", CCM_CSCR, 26, 3); + clk[per1] = imx_clk_divider("per1", "spll_gate", CCM_PCDR, 0, 4); + clk[per2] = imx_clk_divider("per2", "spll_gate", CCM_PCDR, 4, 4); + clk[per3] = imx_clk_divider("per3", "spll_gate", CCM_PCDR, 16, 7); clk[clko] = imx_clk_mux("clko", CCM_CSCR, 29, 3, clko_sel_clks, ARRAY_SIZE(clko_sel_clks)); - clk[dma_gate] = imx_clk_gate("dma_gate", "hclk", SCM_GCCR, 4); + clk[uart3_gate] = imx_clk_gate("uart3_gate", "hclk", SCM_GCCR, 6); + clk[ssi2_gate] = imx_clk_gate("ssi2_gate", "hclk", SCM_GCCR, 5); + clk[brom_gate] = imx_clk_gate("brom_gate", "hclk", SCM_GCCR, 4); + clk[dma_gate] = imx_clk_gate("dma_gate", "hclk", SCM_GCCR, 3); clk[csi_gate] = imx_clk_gate("csi_gate", "hclk", SCM_GCCR, 2); clk[mma_gate] = imx_clk_gate("mma_gate", "hclk", SCM_GCCR, 1); clk[usbd_gate] = imx_clk_gate("usbd_gate", "clk48m", SCM_GCCR, 0); @@ -94,7 +101,7 @@ int __init mx1_clocks_init(unsigned long fref) clk_register_clkdev(clk[per1], "per", "imx1-uart.1"); clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.1"); clk_register_clkdev(clk[per1], "per", "imx1-uart.2"); - clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.2"); + clk_register_clkdev(clk[uart3_gate], "ipg", "imx1-uart.2"); clk_register_clkdev(clk[hclk], NULL, "imx1-i2c.0"); clk_register_clkdev(clk[per2], "per", "imx1-cspi.0"); clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.0");