From patchwork Sun May 11 20:24:40 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 4152501 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 12360BFF02 for ; Sun, 11 May 2014 20:30:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A1ABC20165 for ; Sun, 11 May 2014 20:30:28 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7494220131 for ; Sun, 11 May 2014 20:30:27 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WjaJR-0003jY-GB; Sun, 11 May 2014 20:25:33 +0000 Received: from mail-ee0-x235.google.com ([2a00:1450:4013:c00::235]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WjaJ5-0002Wq-W0 for linux-arm-kernel@lists.infradead.org; Sun, 11 May 2014 20:25:15 +0000 Received: by mail-ee0-f53.google.com with SMTP id c13so4048190eek.26 for ; Sun, 11 May 2014 13:24:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EnV+rjFqLHsZ0gAOx+DMRuyMtILmBwaK4Z4QDABPcZQ=; b=hNz4w5hJi6ZTxOHXOh5vCb21Fda4Gxu0+ilAEaiTpxmUMzdFrBtrjyC3mSAlzKimTf A3djk/EjRdBg6xhkAPuz9kM2BRMSmsH10OkyTP14/GYnBedpn2/QCIQPOcBTse9WwOxz Cs5XPvb+Q8QIswXWQwmLvXzEh1oLGO+Q+4bBi1NIW0yzhg/CLcQpt5kkMbf1qysnMM4O ork0PIX0t0A5xEALy+IZXQgJeQu7sOJ8s5t2KYqW39UHfifENLVIuDAeNxmeNPXw9GiJ vuYZqgkeCrQBwiNTjY8KVBowaF5L6bCB3AXQZIGYdBW7h1mCKSF19wPipivH1S/mYRn6 Z/4g== X-Received: by 10.14.95.8 with SMTP id o8mr27372714eef.15.1399839893607; Sun, 11 May 2014 13:24:53 -0700 (PDT) Received: from topkick.lan (dslc-082-083-214-144.pools.arcor-ip.net. [82.83.214.144]) by mx.google.com with ESMTPSA id w48sm27790850eel.9.2014.05.11.13.24.50 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 11 May 2014 13:24:52 -0700 (PDT) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Subject: [PATCH 7/8] ARM: dts: berlin: convert BG2CD to DT clock nodes Date: Sun, 11 May 2014 22:24:40 +0200 Message-Id: <1399839881-29895-8-git-send-email-sebastian.hesselbarth@gmail.com> In-Reply-To: <1399839881-29895-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1399839881-29895-1-git-send-email-sebastian.hesselbarth@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140511_132512_379664_19339BA4 X-CRM114-Status: GOOD ( 13.13 ) X-Spam-Score: -0.1 (/) Cc: Mark Rutland , devicetree@vger.kernel.org, Mike Turquette , Pawel Moll , Ian Campbell , Antoine Tenart , linux-kernel@vger.kernel.org, Rob Herring , Alexandre Belloni , Kumar Gala , Russell King , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This converts Berlin BG2CD SoC dtsi to make use of the new DT clock nodes for Berlin SoCs. Also add a binding include to ease core clock references. Signed-off-by: Sebastian Hesselbarth --- Cc: Mike Turquette Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Russell King Cc: Alexandre Belloni Cc: Antoine Tenart Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- arch/arm/boot/dts/berlin2cd.dtsi | 198 +++++++++++++++++++++++++++++++----- drivers/clk/berlin/Makefile | 2 + include/dt-bindings/clock/berlin2.h | 35 +++++++ 3 files changed, 207 insertions(+), 28 deletions(-) create mode 100644 include/dt-bindings/clock/berlin2.h diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi index 094968c27533..c1b8dc8264d3 100644 --- a/arch/arm/boot/dts/berlin2cd.dtsi +++ b/arch/arm/boot/dts/berlin2cd.dtsi @@ -12,6 +12,7 @@ */ #include "skeleton.dtsi" +#include #include / { @@ -30,24 +31,18 @@ }; }; - clocks { - smclk: sysmgr-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - }; - - cfgclk: cfg-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <75000000>; - }; + refclk: oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; - sysclk: system-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <300000000>; - }; + twdclk: twdclk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&coreclk CLKID_CPU>; + clock-mult = <1>; + clock-div = <3>; }; soc { @@ -76,7 +71,7 @@ compatible = "arm,cortex-a9-twd-timer"; reg = <0xad0600 0x20>; interrupts = ; - clocks = <&sysclk>; + clocks = <&twdclk>; }; apb@e80000 { @@ -91,7 +86,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c00 0x14>; interrupts = <8>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "okay"; }; @@ -100,7 +95,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c14 0x14>; interrupts = <9>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "okay"; }; @@ -109,7 +104,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c28 0x14>; interrupts = <10>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -118,7 +113,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c3c 0x14>; interrupts = <11>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -127,7 +122,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c50 0x14>; interrupts = <12>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -136,7 +131,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c64 0x14>; interrupts = <13>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -145,7 +140,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c78 0x14>; interrupts = <14>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -154,7 +149,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c8c 0x14>; interrupts = <15>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -169,6 +164,153 @@ }; }; + syspll: pll@ea0014 { + compatible = "marvell,berlin2-pll"; + #clock-cells = <0>; + reg = <0xea0014 0x14>; + clocks = <&refclk>; + }; + + mempll: pll@ea0028 { + compatible = "marvell,berlin2-pll"; + #clock-cells = <0>; + reg = <0xea0028 0x14>; + clocks = <&refclk>; + }; + + cpupll: pll@ea003c { + compatible = "marvell,berlin2-pll"; + #clock-cells = <0>; + reg = <0xea003c 0x14>; + clocks = <&refclk>; + }; + + avpll: pll@ea0040 { + compatible = "marvell,berlin2-avpll"; + #clock-cells = <2>; + reg = <0xea0050 0x100>; + clocks = <&refclk>; + }; + + coreclk: clock@ea0150 { + compatible = "marvell,berlin2-core-clocks"; + #clock-cells = <1>; + reg = <0xea0150 0x1c>; + clocks = <&refclk>, <&syspll>, <&mempll>, <&cpupll>, + <&avpll 0 1>, <&avpll 0 2>, + <&avpll 0 3>, <&avpll 0 4>, + <&avpll 0 5>, <&avpll 0 6>, + <&avpll 0 7>, <&avpll 0 8>, + <&avpll 1 1>, <&avpll 1 2>, + <&avpll 1 3>, <&avpll 1 4>, + <&avpll 1 5>, <&avpll 1 6>, + <&avpll 1 7>, <&avpll 1 8>; + clock-names = "refclk", "syspll", "mempll", "cpupll", + "avpll_a1", "avpll_a2", "avpll_a3", "avpll_a4", + "avpll_a5", "avpll_a6", "avpll_a7", "avpll_a8", + "avpll_b1", "avpll_b2", "avpll_b3", "avpll_b4", + "avpll_b5", "avpll_b6", "avpll_b7", "avpll_b8"; + }; + + gfx3dcore_clk: clock@ea022c { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea0022c 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + gfx3dsys_clk: clock@ea0230 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea00230 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + arc_clk: clock@ea0234 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea00234 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + vip_clk: clock@ea0238 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea00238 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + sdio0xin_clk: clock@ea023c { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea0023c 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + sdio1xin_clk: clock@ea0240 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea00240 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + gfx3dextra_clk: clock@ea0244 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea00244 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + gc360_clk: clock@ea024c { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea0024c 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + sdio_dllmst_clk: clock@ea0250 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea00250 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + apb@fc0000 { compatible = "simple-bus"; #address-cells = <1>; @@ -183,7 +325,7 @@ reg-shift = <2>; reg-io-width = <1>; interrupts = <8>; - clocks = <&smclk>; + clocks = <&refclk>; status = "disabled"; }; @@ -193,7 +335,7 @@ reg-shift = <2>; reg-io-width = <1>; interrupts = <9>; - clocks = <&smclk>; + clocks = <&refclk>; status = "disabled"; }; diff --git a/drivers/clk/berlin/Makefile b/drivers/clk/berlin/Makefile index f0a7dc8b5e30..2b33e1e74503 100644 --- a/drivers/clk/berlin/Makefile +++ b/drivers/clk/berlin/Makefile @@ -1 +1,3 @@ obj-y += berlin2-avpll.o berlin2-pll.o berlin2-div.o +obj-$(CONFIG_MACH_BERLIN_BG2) += bg2.o +obj-$(CONFIG_MACH_BERLIN_BG2CD) += bg2.o diff --git a/include/dt-bindings/clock/berlin2.h b/include/dt-bindings/clock/berlin2.h new file mode 100644 index 000000000000..dacf7edec4d3 --- /dev/null +++ b/include/dt-bindings/clock/berlin2.h @@ -0,0 +1,35 @@ +/* + * Berlin2 BG2/BG2CD clock tree IDs + */ + +#define CLKID_SYS 0 +#define CLKID_CPU 1 +#define CLKID_DRMFIGO 2 +#define CLKID_CFG 3 +#define CLKID_GFX 4 +#define CLKID_ZSP 5 +#define CLKID_PERIF 6 +#define CLKID_PCUBE 7 +#define CLKID_VSCOPE 8 +#define CLKID_NFC_ECC 9 +#define CLKID_VPP 10 +#define CLKID_APP 11 +#define CLKID_AUDIO0 12 +#define CLKID_AUDIO2 23 +#define CLKID_AUDIO3 14 +#define CLKID_AUDIO1 15 +#define CLKID_GETH0 16 +#define CLKID_GETH1 17 +#define CLKID_SATA 18 +#define CLKID_AHBAPB 19 +#define CLKID_USB0 20 +#define CLKID_USB1 21 +#define CLKID_PBRIDGE 22 +#define CLKID_SDIO0 23 +#define CLKID_SDIO1 24 +#define CLKID_NFC 25 +#define CLKID_SMEMC 26 +#define CLKID_AUDIOHD 27 +#define CLKID_VIDEO0 28 +#define CLKID_VIDEO1 29 +#define CLKID_VIDEO2 30