From patchwork Sun May 11 20:24:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 4152431 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5847D9F170 for ; Sun, 11 May 2014 20:29:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3B1D020165 for ; Sun, 11 May 2014 20:29:06 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2C5CD20131 for ; Sun, 11 May 2014 20:29:05 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WjaJb-0003m5-AG; Sun, 11 May 2014 20:25:43 +0000 Received: from mail-ee0-x231.google.com ([2a00:1450:4013:c00::231]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WjaJ6-0002Wo-0V for linux-arm-kernel@lists.infradead.org; Sun, 11 May 2014 20:25:16 +0000 Received: by mail-ee0-f49.google.com with SMTP id e53so4067217eek.8 for ; Sun, 11 May 2014 13:24:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2AtUdIemT25VCWyQwDTYh9trkWluFGOVyjX0PkjTjc8=; b=YbXPHIEnY+MHL0gXc4tspRY6W7/KcsfyEUenU9CEN4SJa0gAo42uWfnG7zY1fY1qz7 Dyw2GtlHVfwOwyN1HbNJu7qqEkvZw+L0u53LNSc+gQBa518RZtz98fJWvGUpHQT2tKG6 C0oanHw5OSKtoI2R1RCbUq3zQG3SNaD0/amOCNiCeosVkQLrBHfid2VbnZcYtwea7Mzs nMXORSlBlB0ag8NE/uCUIuKVp55Uidj+JgcMhU69T7dOmnyjHn7XsHyVQWzw/dAB7LVu P+dQD27yWA9joc+owFEQUCMq/vVxn0A3g5YwEWhntPX7UGULKPlpKNMdQqdPCBJl9DSH edEw== X-Received: by 10.15.48.69 with SMTP id g45mr4208234eew.114.1399839893222; Sun, 11 May 2014 13:24:53 -0700 (PDT) Received: from topkick.lan (dslc-082-083-214-144.pools.arcor-ip.net. [82.83.214.144]) by mx.google.com with ESMTPSA id m2sm85956eey.36.2014.05.11.13.24.50 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 11 May 2014 13:24:52 -0700 (PDT) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Subject: [PATCH 8/8] ARM: dts: berlin: convert BG2 to DT clock nodes Date: Sun, 11 May 2014 22:24:41 +0200 Message-Id: <1399839881-29895-9-git-send-email-sebastian.hesselbarth@gmail.com> In-Reply-To: <1399839881-29895-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1399839881-29895-1-git-send-email-sebastian.hesselbarth@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140511_132512_417898_FBCDF266 X-CRM114-Status: GOOD ( 11.34 ) X-Spam-Score: -0.1 (/) Cc: Mark Rutland , devicetree@vger.kernel.org, Mike Turquette , Pawel Moll , Ian Campbell , Antoine Tenart , linux-kernel@vger.kernel.org, Rob Herring , Alexandre Belloni , Kumar Gala , Russell King , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This converts Berlin BG2 SoC dtsi to make use of the new DT clock nodes for Berlin SoCs. While at it, also fix up twdclk which is running at cpuclk/3 instead of sysclk. Signed-off-by: Sebastian Hesselbarth --- Cc: Mike Turquette Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Russell King Cc: Alexandre Belloni Cc: Antoine Tenart Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- arch/arm/boot/dts/berlin2.dtsi | 200 +++++++++++++++++++++++++++++++++++------ 1 file changed, 171 insertions(+), 29 deletions(-) diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi index 56a1af2f1052..5d84171a1e4b 100644 --- a/arch/arm/boot/dts/berlin2.dtsi +++ b/arch/arm/boot/dts/berlin2.dtsi @@ -12,6 +12,7 @@ */ #include "skeleton.dtsi" +#include #include / { @@ -37,24 +38,18 @@ }; }; - clocks { - smclk: sysmgr-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - }; - - cfgclk: cfg-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - }; + refclk: oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; - sysclk: system-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <400000000>; - }; + twdclk: twdclk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&coreclk CLKID_CPU>; + clock-mult = <1>; + clock-div = <3>; }; soc { @@ -83,7 +78,7 @@ compatible = "arm,cortex-a9-twd-timer"; reg = <0xad0600 0x20>; interrupts = ; - clocks = <&sysclk>; + clocks = <&twdclk>; }; apb@e80000 { @@ -98,7 +93,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c00 0x14>; interrupts = <8>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "okay"; }; @@ -107,7 +102,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c14 0x14>; interrupts = <9>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "okay"; }; @@ -116,7 +111,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c28 0x14>; interrupts = <10>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -125,7 +120,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c3c 0x14>; interrupts = <11>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -134,7 +129,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c50 0x14>; interrupts = <12>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -143,7 +138,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c64 0x14>; interrupts = <13>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -152,7 +147,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c78 0x14>; interrupts = <14>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -161,7 +156,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c8c 0x14>; interrupts = <15>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -176,6 +171,153 @@ }; }; + syspll: pll@ea0014 { + compatible = "marvell,berlin2-pll"; + #clock-cells = <0>; + reg = <0xea0014 0x14>; + clocks = <&refclk>; + }; + + mempll: pll@ea0028 { + compatible = "marvell,berlin2-pll"; + #clock-cells = <0>; + reg = <0xea0028 0x14>; + clocks = <&refclk>; + }; + + cpupll: pll@ea003c { + compatible = "marvell,berlin2-pll"; + #clock-cells = <0>; + reg = <0xea003c 0x14>; + clocks = <&refclk>; + }; + + avpll: pll@ea0040 { + compatible = "marvell,berlin2-avpll"; + #clock-cells = <2>; + reg = <0xea0050 0x100>; + clocks = <&refclk>; + }; + + coreclk: clock@ea0150 { + compatible = "marvell,berlin2-core-clocks"; + #clock-cells = <1>; + reg = <0xea0150 0x1c>; + clocks = <&refclk>, <&syspll>, <&mempll>, <&cpupll>, + <&avpll 0 1>, <&avpll 0 2>, + <&avpll 0 3>, <&avpll 0 4>, + <&avpll 0 5>, <&avpll 0 6>, + <&avpll 0 7>, <&avpll 0 8>, + <&avpll 1 1>, <&avpll 1 2>, + <&avpll 1 3>, <&avpll 1 4>, + <&avpll 1 5>, <&avpll 1 6>, + <&avpll 1 7>, <&avpll 1 8>; + clock-names = "refclk", "syspll", "mempll", "cpupll", + "avpll_a1", "avpll_a2", "avpll_a3", "avpll_a4", + "avpll_a5", "avpll_a6", "avpll_a7", "avpll_a8", + "avpll_b1", "avpll_b2", "avpll_b3", "avpll_b4", + "avpll_b5", "avpll_b6", "avpll_b7", "avpll_b8"; + }; + + gfx3dcore_clk: clock@ea022c { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea0022c 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + gfx3dsys_clk: clock@ea0230 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea00230 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + arc_clk: clock@ea0234 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea00234 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + vip_clk: clock@ea0238 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea00238 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + sdio0xin_clk: clock@ea023c { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea0023c 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + sdio1xin_clk: clock@ea0240 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea00240 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + gfx3dextra_clk: clock@ea0244 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea00244 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + gc360_clk: clock@ea024c { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea0024c 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + sdio_dllmst_clk: clock@ea0250 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea00250 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + apb@fc0000 { compatible = "simple-bus"; #address-cells = <1>; @@ -190,7 +332,7 @@ reg-shift = <2>; reg-io-width = <1>; interrupts = <8>; - clocks = <&smclk>; + clocks = <&refclk>; status = "disabled"; }; @@ -200,7 +342,7 @@ reg-shift = <2>; reg-io-width = <1>; interrupts = <9>; - clocks = <&smclk>; + clocks = <&refclk>; status = "disabled"; }; @@ -210,7 +352,7 @@ reg-shift = <2>; reg-io-width = <1>; interrupts = <10>; - clocks = <&smclk>; + clocks = <&refclk>; status = "disabled"; };