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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: yyhEIrg5reKg3VkfpslBMrkYk/u2vYvd62G7QilZCCXdNH+LuSk5upMrzt6ooq3TU6o53wnJfnZfSb1r9xyl5zf4CH/pec0064+siCAEhrKa+f2Hc6ozBcp7LkOgHjzz0OurO6eYWUYsXdCoUM6FDZ2k0DvHBRFeCjXGXYfxKQ0v4PoFFB6VzPYtHgQqowzWxxVG+eyKYupAeg5ZoYZ4ZkifikMwHG5Qxf7ok+jQn3BJxHFlDzb6QaV0PcytrNS4l0dvIvv8pyJWmF8dOu8cwCZlUAtvaAmp4RcFwWnHxvPduWu5W9xSo5/d1dEphnCT6Ku+y6kgqzUfXZCZdXVeFtFahdHajvT3EFBqn0RMAz+u5/vPoKDUcI94UiEw4oM0HHL8wB4DofAd8v8z3lkmLNZXUI69TRA6ZjXN7VtRSkK571mTjIAJzLePm8AyJ/LL57x6fL9+1W2tcoRqxRFyxBm7cjSh1fXqhb8cuTX97Ryze2rza7EeejguTaPFourbVz5jvRc0gjXNLQ7i0F0t//wX7T1UL9OJ7AwiIO5bDhsgT2Uk9ds6FdgqlmcGVwD09xvRTxwND2JKcXN0z2cDSRCOC8fjRN/n2PL6ZoLGGkftO2VQ8kY6u1FpXErvU+F0GhhG/PE3cOAdjsdixSao5aMg8Bq/0CQ8MNnffa8GQak46xdwvTflzA2QPX1/O391W5ivPKtupjc+X5nk7yAM/FNNSWxZMNnIFWdszqrVB04+uQ3BXgBc2L6LYrgeDMNZykS/MZFUpG8h6UdGDAzPEFqVQflDStGsc019ARVwMa8f8Fo38rsaEVUzoW4+TjeBI/SDXxTUvbGc/I/JbPhS/JRGsAy1PvEOGwoHfD5NKXcDpqJZPDYkQTvpXaae4mWV9/DDw7h4f4fiRwG7U+zgNuYVWIdUDasdTC0yGNgpOuec2BQh84b0svz/LO/1sjuACcynb/LLw+0TC9Pv2mOoIwECeXh+gm9Zd1BZYDjK6bPy9bINx4EPyh5zRqgpKLJhbvglsDgmkQ8vvtxN2eUTMYV8Nd81PlU8V+CuxZ5zE3WKMf62IoQlIi9/BGGiIhDLkoGHf6prOZvMv+fRQdwWIOmzSJSSrjmAACqK1STCr101OhWb/WpZQwxYpb1Ko6ZLYw7n1vN312pWzisWc05+a6oppft1ZDM7i6ZRnVkQRS3Njs0LMEvy3/NVgG1GomDSWStl2rcfEyXr5srdCFj9to7aRco42JhAIqvOg9IslaO0SC5aGXAwVO4yONQ/NfUZg2BkD4qDVrXSoPBxcYH3BqjEoRQhXD+XwcQ9f3tcij1IcXm9OHEys0vMv/WZmqfj5MRSENspfoWEM8YHMc5bk8Wtu5WVXPdPyH+DLirO6y2VeirPxFlFx+7ypEHEavcsJHTu5Ultd5k7q9HRRtGsm3Dyazp4qH8aYZZ5C/x95Sde1gSZcIftBQ0e9Sp4+8p4BO6bL0jnwfnBpif6i/9gvgQDjKvNJ1L/eKSjyYNYAIKVVhT8unyFYGqLfy1uJTgcNbaVYQz8ScruMs0S+O+KjVbXMUs5NuKRKw47Rgbq5sSIOCsKzaTwL6H/J2jWT4/v X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: ddb3c262-98a1-4ae7-d0e0-08dc6f90b293 X-MS-Exchange-CrossTenant-AuthSource: DM6PR12MB3849.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 May 2024 18:57:24.3794 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Nj9fbZ9Uc6gDIGbACiR1MBaakdBgdunUA05PUv8p0wNkXeZP4nxUmKWpfMkNRMIp X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7514 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240508_115740_869771_BFEA2632 X-CRM114-Status: GOOD ( 17.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The SVA cleanup made the SSID logic entirely general so all we need to do is call it with the correct cd table entry for a S1 domain. This is slightly tricky because of the ASID and how the locking works, the simple fix is to just update the ASID once we get the right locks. Tested-by: Nicolin Chen Tested-by: Shameer Kolothum Signed-off-by: Jason Gunthorpe Reviewed-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 41 ++++++++++++++++++++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 +- 2 files changed, 41 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index ccc10ad3ab996d..9506073678bbcb 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2768,6 +2768,36 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) return 0; } +static int arm_smmu_s1_set_dev_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t id) +{ + struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); + struct arm_smmu_master *master = dev_iommu_priv_get(dev); + struct arm_smmu_device *smmu = master->smmu; + struct arm_smmu_cd target_cd; + int ret = 0; + + mutex_lock(&smmu_domain->init_mutex); + if (!smmu_domain->smmu) + ret = arm_smmu_domain_finalise(smmu_domain, smmu); + else if (smmu_domain->smmu != smmu) + ret = -EINVAL; + mutex_unlock(&smmu_domain->init_mutex); + if (ret) + return ret; + + if (smmu_domain->stage != ARM_SMMU_DOMAIN_S1) + return -EINVAL; + + /* + * We can read cd.asid outside the lock because arm_smmu_set_pasid() + * will fix it + */ + arm_smmu_make_s1_cd(&target_cd, master, smmu_domain); + return arm_smmu_set_pasid(master, to_smmu_domain(domain), id, + &target_cd); +} + static void arm_smmu_update_ste(struct arm_smmu_master *master, struct iommu_domain *sid_domain, bool want_ats) @@ -2795,7 +2825,7 @@ static void arm_smmu_update_ste(struct arm_smmu_master *master, int arm_smmu_set_pasid(struct arm_smmu_master *master, struct arm_smmu_domain *smmu_domain, ioasid_t pasid, - const struct arm_smmu_cd *cd) + struct arm_smmu_cd *cd) { struct iommu_domain *sid_domain = iommu_get_domain_for_dev(master->dev); struct attach_state state = { @@ -2827,6 +2857,14 @@ int arm_smmu_set_pasid(struct arm_smmu_master *master, if (ret) goto out_unlock; + /* + * We don't want to obtain to the asid_lock too early, so fix up the + * caller set ASID under the lock in case it changed. + */ + cd->data[0] &= ~cpu_to_le64(CTXDESC_CD_0_ASID); + cd->data[0] |= cpu_to_le64( + FIELD_PREP(CTXDESC_CD_0_ASID, smmu_domain->cd.asid)); + arm_smmu_write_cd_entry(master, pasid, cdptr, cd); arm_smmu_update_ste(master, sid_domain, state.want_ats); @@ -3352,6 +3390,7 @@ static struct iommu_ops arm_smmu_ops = { .owner = THIS_MODULE, .default_domain_ops = &(const struct iommu_domain_ops) { .attach_dev = arm_smmu_attach_dev, + .set_dev_pasid = arm_smmu_s1_set_dev_pasid, .map_pages = arm_smmu_map_pages, .unmap_pages = arm_smmu_unmap_pages, .flush_iotlb_all = arm_smmu_flush_iotlb_all, diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 3c189a48e29757..c32ac37c0b0e00 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -801,7 +801,7 @@ void arm_smmu_write_cd_entry(struct arm_smmu_master *master, int ssid, int arm_smmu_set_pasid(struct arm_smmu_master *master, struct arm_smmu_domain *smmu_domain, ioasid_t pasid, - const struct arm_smmu_cd *cd); + struct arm_smmu_cd *cd); void arm_smmu_remove_pasid(struct arm_smmu_master *master, struct arm_smmu_domain *smmu_domain, ioasid_t pasid);