Message ID | 1400113986-339-5-git-send-email-abrestic@chromium.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 05/14/2014 06:33 PM, Andrew Bresticker wrote: > Initialize the XUSB-related clocks with appropriate parents and rates > for both Tegra114 and Tegra124. These first 4 clock driver patches look plausible to me, although I didn't look that hard! Peter or Mike, if they look OK to you, can you please pick them up for 3.16 so that by the time we apply the rest of the patches in this series for 3.17, the clock dependencies are already there? Thanks.
On Thu, May 15, 2014 at 09:22:00PM +0200, Stephen Warren wrote: > On 05/14/2014 06:33 PM, Andrew Bresticker wrote: > > Initialize the XUSB-related clocks with appropriate parents and rates > > for both Tegra114 and Tegra124. > > These first 4 clock driver patches look plausible to me, although I > didn't look that hard! > > Peter or Mike, if they look OK to you, can you please pick them up for > 3.16 so that by the time we apply the rest of the patches in this series > for 3.17, the clock dependencies are already there? Thanks. Looks fine to me. Applied for 3.16, hopefully it will still make it. Cheers, Peter.
diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c index 841f54f..b9c8ba2 100644 --- a/drivers/clk/tegra/clk-tegra114.c +++ b/drivers/clk/tegra/clk-tegra114.c @@ -1296,7 +1296,12 @@ static struct tegra_clk_init_table init_table[] __initdata = { {TEGRA114_CLK_GR3D, TEGRA114_CLK_PLL_C2, 300000000, 0}, {TEGRA114_CLK_DSIALP, TEGRA114_CLK_PLL_P, 68000000, 0}, {TEGRA114_CLK_DSIBLP, TEGRA114_CLK_PLL_P, 68000000, 0}, - + {TEGRA114_CLK_PLL_RE_VCO, TEGRA114_CLK_CLK_MAX, 612000000, 0}, + {TEGRA114_CLK_XUSB_SS_SRC, TEGRA114_CLK_PLL_RE_OUT, 122400000, 0}, + {TEGRA114_CLK_XUSB_FS_SRC, TEGRA114_CLK_PLL_U_48M, 48000000, 0}, + {TEGRA114_CLK_XUSB_HS_SRC, TEGRA114_CLK_XUSB_SS_DIV2, 61200000, 0}, + {TEGRA114_CLK_XUSB_FALCON_SRC, TEGRA114_CLK_PLL_P, 204000000, 0}, + {TEGRA114_CLK_XUSB_HOST_SRC, TEGRA114_CLK_PLL_P, 102000000, 0}, /* This MUST be the last entry. */ {TEGRA114_CLK_CLK_MAX, TEGRA114_CLK_CLK_MAX, 0, 0}, }; diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c index 6cabc3d..80d64bf 100644 --- a/drivers/clk/tegra/clk-tegra124.c +++ b/drivers/clk/tegra/clk-tegra124.c @@ -1366,6 +1366,12 @@ static struct tegra_clk_init_table init_table[] __initdata = { {TEGRA124_CLK_SBC4, TEGRA124_CLK_PLL_P, 12000000, 1}, {TEGRA124_CLK_TSEC, TEGRA124_CLK_PLL_C3, 0, 0}, {TEGRA124_CLK_MSENC, TEGRA124_CLK_PLL_C3, 0, 0}, + {TEGRA124_CLK_PLL_RE_VCO, TEGRA124_CLK_CLK_MAX, 672000000, 0}, + {TEGRA124_CLK_XUSB_SS_SRC, TEGRA124_CLK_PLL_U_480M, 120000000, 0}, + {TEGRA124_CLK_XUSB_FS_SRC, TEGRA124_CLK_PLL_U_48M, 48000000, 0}, + {TEGRA124_CLK_XUSB_HS_SRC, TEGRA124_CLK_PLL_U_60M, 60000000, 0}, + {TEGRA124_CLK_XUSB_FALCON_SRC, TEGRA124_CLK_PLL_RE_OUT, 224000000, 0}, + {TEGRA124_CLK_XUSB_HOST_SRC, TEGRA124_CLK_PLL_RE_OUT, 112000000, 0}, /* This MUST be the last entry. */ {TEGRA124_CLK_CLK_MAX, TEGRA124_CLK_CLK_MAX, 0, 0}, };