From patchwork Fri May 16 09:29:58 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Bolle X-Patchwork-Id: 4189691 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 099B29F1C0 for ; Fri, 16 May 2014 09:33:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 29EC7202EC for ; Fri, 16 May 2014 09:33:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2C4B92026F for ; Fri, 16 May 2014 09:33:16 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WlETC-0005Si-ME; Fri, 16 May 2014 09:30:26 +0000 Received: from cpsmtpb-ews07.kpnxchange.com ([213.75.39.10]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WlET9-0004Mz-3O for linux-arm-kernel@lists.infradead.org; Fri, 16 May 2014 09:30:24 +0000 Received: from cpsps-ews01.kpnxchange.com ([10.94.84.168]) by cpsmtpb-ews07.kpnxchange.com with Microsoft SMTPSVC(7.5.7601.17514); Fri, 16 May 2014 11:29:59 +0200 Received: from CPSMTPM-TLF104.kpnxchange.com ([195.121.3.7]) by cpsps-ews01.kpnxchange.com with Microsoft SMTPSVC(7.5.7601.17514); Fri, 16 May 2014 11:29:58 +0200 Received: from [192.168.10.106] ([195.240.213.44]) by CPSMTPM-TLF104.kpnxchange.com with Microsoft SMTPSVC(7.5.7601.17514); Fri, 16 May 2014 11:29:58 +0200 Message-ID: <1400232598.20342.16.camel@x220> Subject: [PATCH] ARM: remove ARM710 specific assembler code From: Paul Bolle To: Russell King Date: Fri, 16 May 2014 11:29:58 +0200 In-Reply-To: <4305975.PvMXZQ020k@wuerfel> References: <1364507176.1345.45.camel@x61.thuisdomein> <8309592.drxAj71PnZ@wuerfel> <1400059550.31197.12.camel@x220> <4305975.PvMXZQ020k@wuerfel> X-Mailer: Evolution 3.10.4 (3.10.4-2.fc20) Mime-Version: 1.0 X-OriginalArrivalTime: 16 May 2014 09:29:58.0796 (UTC) FILETIME=[67C924C0:01CF70E9] X-RcptDomain: lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140516_023023_511819_AC2CF37C X-CRM114-Status: UNSURE ( 7.42 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.0 (/) Cc: linux-arm-kernel@lists.infradead.org, Arnd Bergmann , linux-kernel@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Support for ARM710 CPUs was removed in v3.5. But a few lines of ARM710 specific assembler code were left in the tree. Remove these too. Signed-off-by: Paul Bolle --- This minor cleanup was suggested by Arnd. This patch is mostly guesswork, as I already told Arnd, since I have never touched ARM assembler before (as far as I can remember). Untested too! And this does need testing. arch/arm/mm/proc-arm720.S | 30 ------------------------------ 1 file changed, 30 deletions(-) diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S index d42c37f9f5bc..6699f91a6a0f 100644 --- a/arch/arm/mm/proc-arm720.S +++ b/arch/arm/mm/proc-arm720.S @@ -116,34 +116,6 @@ ENTRY(cpu_arm720_reset) ENDPROC(cpu_arm720_reset) .popsection - .type __arm710_setup, #function -__arm710_setup: - mov r0, #0 - mcr p15, 0, r0, c7, c7, 0 @ invalidate caches -#ifdef CONFIG_MMU - mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4) -#endif - mrc p15, 0, r0, c1, c0 @ get control register - ldr r5, arm710_cr1_clear - bic r0, r0, r5 - ldr r5, arm710_cr1_set - orr r0, r0, r5 - mov pc, lr @ __ret (head.S) - .size __arm710_setup, . - __arm710_setup - - /* - * R - * .RVI ZFRS BLDP WCAM - * .... 0001 ..11 1101 - * - */ - .type arm710_cr1_clear, #object - .type arm710_cr1_set, #object -arm710_cr1_clear: - .word 0x0f3f -arm710_cr1_set: - .word 0x013d - .type __arm720_setup, #function __arm720_setup: mov r0, #0 @@ -177,7 +149,6 @@ arm720_crval: string cpu_arch_name, "armv4t" string cpu_elf_name, "v4" - string cpu_arm710_name, "ARM710T" string cpu_arm720_name, "ARM720T" .align @@ -215,5 +186,4 @@ __\name\()_proc_info: .size __\name\()_proc_info, . - __\name\()_proc_info .endm - arm720_proc_info arm710, 0x41807100, 0xffffff00, cpu_arm710_name, __arm710_setup arm720_proc_info arm720, 0x41807200, 0xffffff00, cpu_arm720_name, __arm720_setup