From patchwork Fri May 16 15:01:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean Pihet X-Patchwork-Id: 4193871 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id F26819F1C0 for ; Fri, 16 May 2014 15:04:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2D456202FF for ; Fri, 16 May 2014 15:04:35 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3DF6E201F7 for ; Fri, 16 May 2014 15:04:34 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WlJdy-000749-QG; Fri, 16 May 2014 15:01:54 +0000 Received: from mail-ee0-f52.google.com ([74.125.83.52]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WlJdv-0006z7-Jb for linux-arm-kernel@lists.infradead.org; Fri, 16 May 2014 15:01:52 +0000 Received: by mail-ee0-f52.google.com with SMTP id e53so1624082eek.25 for ; Fri, 16 May 2014 08:01:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=6chsgF8bAPYV8kbA7JYgrJauV1Twzso6//SMl5XDwF8=; b=JKhnhVynxzh+IV+n3JJBCf/gbNneythzYc+QUa1Xvd2ZJ8HkrwRordzo7rO235jiNQ X6OMYIl0NHlO95+ntf2tspEKGc/wZQGh+8gBzFKh55rnxa1zs1xtWMLynJmiovZGrJKG hbAVsz0CeV5ZcXC1fz7/91Zt+oTuq4Lg5uT17VGrkO6mehxjwQaFO5DS33vbO4oZ8qFL eONRJGP9Mqbsy44Wl/o/n6sVjJrSJiijd5jpbJeFR2QjBd6aEn75nFLNID2NF7ql5dIu +a+cvKixO49UqwxBqFG3GKFalP6HiONzWF+30m82wzHhQvSlLE3OjLsoqxXSYrqqZ5L5 SOMQ== X-Gm-Message-State: ALoCoQnTY7gowWSO2I0IouhhddReiOVGgFd5Ex18JowpFqB54VNzzPaKgEsuKFYslET4m6PcCXPr X-Received: by 10.15.56.65 with SMTP id x41mr23653281eew.13.1400252489529; Fri, 16 May 2014 08:01:29 -0700 (PDT) Received: from localhost.localdomain (74.16-201-80.adsl-dyn.isp.belgacom.be. [80.201.16.74]) by mx.google.com with ESMTPSA id a6sm20644564eem.16.2014.05.16.08.01.28 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 16 May 2014 08:01:28 -0700 (PDT) From: Jean Pihet To: linux-arm-kernel@lists.infradead.org, Will Deacon , linux-kernel@vger.kernel.org Subject: [PATCH] [RFC] ARM: perf: allow tracing with kernel tracepoints events Date: Fri, 16 May 2014 17:01:16 +0200 Message-Id: <1400252476-20128-1-git-send-email-jean.pihet@linaro.org> X-Mailer: git-send-email 1.7.11.7 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140516_080151_844158_EB3F0FEA X-CRM114-Status: GOOD ( 11.30 ) X-Spam-Score: -0.7 (/) Cc: Jean Pihet , Jiri Olsa X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When tracing with tracepoints events the IP and CPSR are set to 0, preventing the perf code to resolve the symbols: ./perf record -e kmem:kmalloc cal [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.007 MB perf.data (~321 samples) ] ./perf report Overhead Command Shared Object Symbol ........ ....... ............. ........... 40.78% cal [unknown] [.]00000000 31.6% cal [unknown] [.]00000000 The examination of the gathered samples (perf report -D) shows the IP is set to 0 and that the samples are considered as user space samples, while the IP should be set from the registers and the samples should be considered as kernel samples. The fix is to implement perf_arch_fetch_caller_regs for ARM, which fills the necessary registers: ip, lr, sp and cpsr (used to check the user mode property of the samples). Heavily inspired from arch/arm/include/asm/kexec.h. Reported by Sneha Priya on linaro-dev, cf. http://lists.linaro.org/pipermail/linaro-dev/2014-May/017151.html Signed-off-by: Jean Pihet Cc: Will Deacon Reported-by: Sneha Priya --- arch/arm/include/asm/perf_event.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h index 7558775..d466e39 100644 --- a/arch/arm/include/asm/perf_event.h +++ b/arch/arm/include/asm/perf_event.h @@ -26,6 +26,19 @@ struct pt_regs; extern unsigned long perf_instruction_pointer(struct pt_regs *regs); extern unsigned long perf_misc_flags(struct pt_regs *regs); #define perf_misc_flags(regs) perf_misc_flags(regs) + +#define perf_arch_fetch_caller_regs(regs, __ip) { \ + instruction_pointer(regs)= (__ip); \ + __asm__ __volatile__ ( \ + "mov %[_ARM_sp], sp\n\t" \ + "str lr, %[_ARM_lr]\n\t" \ + "mrs %[_ARM_cpsr], cpsr\n\t" \ + : [_ARM_cpsr] "=r" (regs->ARM_cpsr), \ + [_ARM_sp] "=r" (regs->ARM_sp), \ + [_ARM_lr] "=o" (regs->ARM_lr) \ + : : "memory" \ + ); \ +} #endif #endif /* __ARM_PERF_EVENT_H__ */