From patchwork Tue May 20 13:10:19 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 4209731 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D6CDD9F32A for ; Tue, 20 May 2014 13:15:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1CD6F2021F for ; Tue, 20 May 2014 13:15:19 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 54D5B202D1 for ; Tue, 20 May 2014 13:15:15 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wmjqc-0003Sw-8W; Tue, 20 May 2014 13:12:50 +0000 Received: from mail-pa0-f49.google.com ([209.85.220.49]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WmjqW-0003C3-Uv for linux-arm-kernel@lists.infradead.org; Tue, 20 May 2014 13:12:45 +0000 Received: by mail-pa0-f49.google.com with SMTP id lj1so312074pab.8 for ; Tue, 20 May 2014 06:12:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=oAQch9k7pZ4IOC8GTVt16D0QahQiLP+P46g5bslxxn0=; b=QhI4rBKrivuCVy+SLfuLtDCUErTi9kWf9Iim5PXRaursecNfWjTgI2oAH2VUZCHsMa ElFTFWwqdjt27K/NqxJdOACVHCe05Iqc4YBfd9V8ZGlgokGP85079wNX4dTHMljH8Cvc l5Vr8ifrD6uwyIhNFWTDzx3IoiVMzvhIqS8dXPLuaRG6AhjzlN35yraUptT3wt95U5vN 9y7NVt0HG672Ibf1rrh46UegE8/agfuh6Mir/ufbdrejDDE2G1ldZXeJSSgU/2qCNTSf Qy7raoLvMSqOm/KQ3a4SOwI0jCHGoXR9WkR8pUQyDnCEWGh58uR6nlnJEt1rUwFTC+cj nQ9g== X-Gm-Message-State: ALoCoQmKxbkHFkzz4Nk5DYRTy0bOsqt2FB8lnk5LpsGpLRDo6SX43CqyaGZvlQgWZXxWEFVzUqCJ X-Received: by 10.66.193.104 with SMTP id hn8mr50219760pac.99.1400591541312; Tue, 20 May 2014 06:12:21 -0700 (PDT) Received: from localhost.localdomain ([140.206.182.114]) by mx.google.com with ESMTPSA id av4sm31085722pac.8.2014.05.20.06.12.08 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 20 May 2014 06:12:20 -0700 (PDT) From: Haojian Zhuang To: tglx@linutronix.de, linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org, arnd@arndb.de, olof@lixom.net, khilman@kernel.org, xuwei5@hisilicon.com, christoffer.dall@linaro.org, Dave.Martin@arm.com, nicolas.pitre@linaro.org, marc.zyngier@arm.com, jason@lakedaemon.net Subject: [PATCH v9 06/14] ARM: hisi: enable HiP04 Date: Tue, 20 May 2014 21:10:19 +0800 Message-Id: <1400591427-21922-7-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1400591427-21922-1-git-send-email-haojian.zhuang@linaro.org> References: <1400591427-21922-1-git-send-email-haojian.zhuang@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140520_061245_020916_D6AA8973 X-CRM114-Status: GOOD ( 12.87 ) X-Spam-Score: -0.7 (/) Cc: Haojian Zhuang X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Support HiP04 SoC what supports 16 cores. And it relies on MCPM framework. Signed-off-by: Haojian Zhuang --- arch/arm/mach-hisi/Kconfig | 10 +++++++++- arch/arm/mach-hisi/hisilicon.c | 9 +++++++++ arch/arm/mach-hisi/platmcpm.c | 1 - 3 files changed, 18 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/mach-hisi/Kconfig index da16efd..3f1ece7 100644 --- a/arch/arm/mach-hisi/Kconfig +++ b/arch/arm/mach-hisi/Kconfig @@ -17,7 +17,15 @@ config ARCH_HI3xxx select PINCTRL select PINCTRL_SINGLE help - Support for Hisilicon Hi36xx/Hi37xx processor family + Support for Hisilicon Hi36xx/Hi37xx SoC family + +config ARCH_HIP04 + bool "Hisilicon HiP04 Cortex A15 family" if ARCH_MULTI_V7 + select HAVE_ARM_ARCH_TIMER + select MCPM if SMP + select MCPM_QUAD_CLUSTER if SMP + help + Support for Hisilicon HiP04 SoC family endmenu diff --git a/arch/arm/mach-hisi/hisilicon.c b/arch/arm/mach-hisi/hisilicon.c index 741faf3..a9f648f 100644 --- a/arch/arm/mach-hisi/hisilicon.c +++ b/arch/arm/mach-hisi/hisilicon.c @@ -88,3 +88,12 @@ DT_MACHINE_START(HI3620, "Hisilicon Hi3620 (Flattened Device Tree)") .smp = smp_ops(hi3xxx_smp_ops), .restart = hi3xxx_restart, MACHINE_END + +static const char *hip04_compat[] __initconst = { + "hisilicon,hip04-d01", + NULL, +}; + +DT_MACHINE_START(HIP04, "Hisilicon HiP04 (Flattened Device Tree)") + .dt_compat = hip04_compat, +MACHINE_END diff --git a/arch/arm/mach-hisi/platmcpm.c b/arch/arm/mach-hisi/platmcpm.c index b991e82..2bda12b 100644 --- a/arch/arm/mach-hisi/platmcpm.c +++ b/arch/arm/mach-hisi/platmcpm.c @@ -134,7 +134,6 @@ static int hip04_mcpm_power_up(unsigned int cpu, unsigned int cluster) CORE_DEBUG_RESET_BIT(cpu); writel_relaxed(data, sysctrl + SC_CPU_RESET_DREQ(cluster)); spin_unlock_irq(&boot_lock); - msleep(POLL_MSEC); return 0; }